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Searched refs:setFixed (Results 1 – 10 of 10) sorted by relevance

/third_party/mesa3d/src/amd/compiler/
Daco_ir.h503 setFixed(PhysReg{128}); in Operand()
511 setFixed(reg); in Operand()
525 op.setFixed(PhysReg{0u}); in c8()
538 op.setFixed(PhysReg{128u + v}); in c16()
540 op.setFixed(PhysReg{(unsigned)(192 - (int16_t)v)}); in c16()
542 op.setFixed(PhysReg{240}); in c16()
544 op.setFixed(PhysReg{241}); in c16()
546 op.setFixed(PhysReg{242}); in c16()
548 op.setFixed(PhysReg{243}); in c16()
550 op.setFixed(PhysReg{244}); in c16()
[all …]
Daco_register_allocation.cpp791 def.setFixed(it->second.physReg()); in update_renames()
807 other.second.setFixed(it->second.physReg()); in update_renames()
816 op.setFixed(other.second.physReg()); in update_renames()
857 op.setFixed(copy.second.physReg()); in update_renames()
1138 pc_op.setFixed(var.reg); in get_regs_for_copies()
1227 pc_op.setFixed(var.reg); in get_regs_for_copies()
1503 pc_op.setFixed(ctx.assignments[var.id].reg); in compact_relocate_vars()
1927 instr->operands[idx].setFixed(m0); in operand_can_use_reg()
1985 pc_op.setFixed(src); in get_reg_for_operand()
2014 prev_phi->definitions[0].setFixed(pc.second.physReg()); in get_reg_phi()
[all …]
Daco_ir.cpp303 instr->definitions[0].setFixed(vcc); in convert_to_SDWA()
305 instr->definitions[1].setFixed(vcc); in convert_to_SDWA()
307 instr->operands[2].setFixed(vcc); in convert_to_SDWA()
392 instr->definitions.back().setFixed(vcc); in convert_to_DPP()
395 instr->operands[2].setFixed(vcc); in convert_to_DPP()
Daco_lower_to_hw_instr.cpp194 instr->definitions[1].setFixed(vcc); in emit_vadd32()
1068 op.setFixed(PhysReg{248}); /* it can be an inline constant on GFX8+ */ in copy_constant()
1264 lo_half.setFixed(lo_half.physReg().advance(4 - def.physReg().byte())); in do_copy()
1428 tmp_copy.op.setFixed(copy.def.physReg()); in do_swap()
1429 tmp_copy.def.setFixed(copy.op.physReg()); in do_swap()
1492 lo.setFixed(def.physReg()); in do_pack_2x16()
1497 hi.setFixed(def.physReg().advance(2)); in do_pack_2x16()
1506 op.setFixed(reg); in do_pack_2x16()
1713 other->second.op.setFixed(it->first.advance(reg_hi.byte())); in handle_operands()
1905 target->second.op.setFixed(swap.op.physReg()); in handle_operands()
[all …]
Daco_instruction_selection.cpp10714 branch->operands[0].setFixed(scc); in begin_uniform_if_then()
11393 chan.setFixed(chan_reg); in create_fs_jump_to_epilog()
11602 startpgm->definitions[arg].setFixed(PhysReg{file == AC_ARG_SGPR ? reg : reg + 256}); in add_startpgm()
11629 def.setFixed(PhysReg(256 + ctx->args->ac.args[idx].offset)); in add_startpgm()
Daco_optimizer.cpp4468 instr->definitions[0].setFixed(scc); in select_instruction()
/third_party/mesa3d/src/amd/compiler/tests/
Dtest_optimizer_postRA.cpp41 startpgm->definitions[0].setFixed(reg_v0);
147 op_in_0.setFixed(reg_s0);
149 op_in_1.setFixed(reg_s4);
151 op_in_2.setFixed(reg_s6);
285 bld.instructions->at(0)->definitions[0].setFixed(PhysReg(256));
286 bld.instructions->at(0)->definitions[1].setFixed(PhysReg(257));
287 bld.instructions->at(0)->definitions[2].setFixed(vcc);
288 bld.instructions->at(0)->definitions[3].setFixed(PhysReg(0));
Dtest_hard_clause.cpp32 desc_op.setFixed(PhysReg(0)); in create_mubuf()
48 desc_op.setFixed(PhysReg(0)); in create_mtbuf()
74 mimg->operands[0].setFixed(PhysReg(0)); in create_mimg()
94 desc_op.setFixed(PhysReg(0)); in create_smem_buffer()
Dtest_regalloc.cpp95 op.setFixed(PhysReg(2));
109 op.setFixed(PhysReg(1));
126 op.setFixed(PhysReg(2));
143 op.setFixed(PhysReg(2));
Dtest_assembler.cpp37 bld.smem(aco_opcode::s_memtime, bld.def(s2)).def(0).setFixed(PhysReg{0});
297 dst0.setFixed(PhysReg(0));
298 dst1.setFixed(PhysReg(2));