| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_llvm_tess.c | 33 return si_unpack_param(ctx, ctx->args.tcs_rel_ids, 0, 8); in si_get_rel_patch_id()
84 return si_unpack_param(ctx, ctx->tcs_out_lds_offsets, 16, 16); in get_tcs_out_patch0_patch_data_offset()
107 si_unpack_param(ctx, ctx->tcs_offchip_layout, 6, 5), ctx->ac.i32_1, ""); in si_get_num_tcs_out_vertices()
158 num_patches = si_unpack_param(ctx, ctx->tcs_offchip_layout, 0, 6); in get_tcs_tes_buffer_address()
175 LLVMValueRef patch_data_offset = si_unpack_param(ctx, ctx->tcs_offchip_layout, 11, 21); in get_tcs_tes_buffer_address()
450 invocation_id = si_unpack_param(ctx, ctx->args.tcs_rel_ids, 8, 5); in si_llvm_tcs_build_end()
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| D | si_shader_llvm_ps.c | 31 return si_unpack_param(ctx, ctx->args.ancillary, 8, 4); in si_get_sample_id()
76 args.coords[chan++] = si_unpack_param(ctx, ctx->pos_fixed_pt, 0, 16); in si_nir_emit_fbfetch()
79 args.coords[chan++] = si_unpack_param(ctx, ctx->pos_fixed_pt, 16, 16); in si_nir_emit_fbfetch()
83 args.coords[chan++] = si_unpack_param(ctx, ctx->args.ancillary, 16, 11); in si_nir_emit_fbfetch()
545 address[0] = si_unpack_param(ctx, param_pos_fixed_pt, 0, 5); in si_llvm_emit_polygon_stipple()
546 address[1] = si_unpack_param(ctx, param_pos_fixed_pt, 16, 5); in si_llvm_emit_polygon_stipple()
800 LLVMValueRef sampleid = si_unpack_param(ctx, ancillary, 8, 4); in si_llvm_build_ps_prolog()
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| D | si_shader_llvm_gs.c | 36 si_unpack_param(ctx, ctx->args.merged_wave_info, 0, 8), ""); in si_is_es_thread()
43 si_unpack_param(ctx, ctx->args.merged_wave_info, 8, 8), ""); in si_is_gs_thread()
94 return si_unpack_param(ctx, ctx->args.merged_wave_info, 16, 8); in si_get_gs_wave_id()
448 stream_id = si_unpack_param(&ctx, ctx.args.streamout_config, 24, 2); in si_generate_gs_copy_shader()
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| D | si_shader_llvm.c | 375 LLVMValueRef si_unpack_param(struct si_shader_context *ctx, struct ac_arg param, unsigned rshift, in si_unpack_param() function
741 si_unpack_param(ctx, ctx->block_size, 0, 10), in si_llvm_load_intrinsic()
742 si_unpack_param(ctx, ctx->block_size, 10, 10), in si_llvm_load_intrinsic()
743 si_unpack_param(ctx, ctx->block_size, 20, 10), in si_llvm_load_intrinsic()
763 return si_unpack_param(ctx, ctx->tcs_out_lds_layout, 13, 6); in si_llvm_load_intrinsic()
778 si_unpack_param(ctx, ctx->tcs_offchip_layout, 0, 6), in si_llvm_load_intrinsic()
782 return si_unpack_param(ctx, ctx->tcs_offchip_layout, 11, 21); in si_llvm_load_intrinsic()
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| D | si_shader_llvm_vs.c | 324 LLVMValueRef so_vtx_count = si_unpack_param(ctx, ctx->args.streamout_config, 16, 7); in si_llvm_emit_streamout()
738 num_export_threads = si_unpack_param(ctx, ctx->args.merged_wave_info, 0, 8); in si_llvm_build_vs_exports()
781 si_unpack_param(ctx, ctx->args.gs_attr_offset, 0, 15), in si_llvm_build_vs_exports()
922 si_unpack_param(ctx, input_sgpr_param[3], 8, 8), ctx->ac.i32_0, ""); in si_llvm_build_vs_prolog()
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| D | gfx10_shader_ngg.c | 34 return si_unpack_param(ctx, ctx->args.merged_wave_info, 24, 4); in get_wave_id_in_tg()
39 return si_unpack_param(ctx, ctx->args.merged_wave_info, 28, 4); in get_tgsize()
53 return si_unpack_param(ctx, ctx->args.gs_tg_info, 12, 9); in ngg_get_vtx_cnt()
58 return si_unpack_param(ctx, ctx->args.gs_tg_info, 22, 9); in ngg_get_prim_cnt()
63 return si_unpack_param(ctx, ctx->args.gs_tg_info, 0, 12); in ngg_get_ordered_id()
204 prim.index[i] = si_unpack_param(ctx, ctx->args.gs_vtx_offset[i / 2], (i & 1) * 16, 16); in gfx10_ngg_build_export_prim()
1147 vtxindex[i] = si_unpack_param(ctx, ctx->args.gs_vtx_offset[i / 2], (i & 1) * 16, 16); in gfx10_ngg_culling_build_end()
1574 vtxindex[i] = si_unpack_param(ctx, ctx->args.gs_vtx_offset[0], 10 * i, 9); in gfx10_ngg_build_end()
1577 vtxindex[i] = si_unpack_param(ctx, ctx->args.gs_vtx_offset[i / 2], (i & 1) * 16, 16); in gfx10_ngg_build_end()
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| D | si_shader_internal.h | 217 LLVMValueRef si_unpack_param(struct si_shader_context *ctx, struct ac_arg param, unsigned rshift,
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| D | si_shader.h | 299 #define GET_FIELD(ctx, field) si_unpack_param((ctx), (ctx)->vs_state_bits, field##__SHIFT, \
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