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Searched refs:stencil_surf (Results 1 – 10 of 10) sorted by relevance

/third_party/mesa3d/src/intel/isl/
Disl_emit_depth_stencil.c86 } else if (info->stencil_surf) { in isl_genX()
87 db.SurfaceType = isl_encode_ds_surftype[info->stencil_surf->dim]; in isl_genX()
89 db.Width = info->stencil_surf->logical_level0_px.width - 1; in isl_genX()
90 db.Height = info->stencil_surf->logical_level0_px.height - 1; in isl_genX()
92 db.Depth = info->stencil_surf->logical_level0_px.depth - 1; in isl_genX()
98 if (info->depth_surf || info->stencil_surf) { in isl_genX()
152 info->stencil_surf && info->stencil_surf->format == ISL_FORMAT_R8_UINT; in isl_genX()
179 if (info->stencil_surf) { in isl_genX()
184 sb.TiledMode = isl_encode_tiling[info->stencil_surf->tiling]; in isl_genX()
188 isl_get_render_compression_format(info->stencil_surf->format); in isl_genX()
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Disl.c2457 if (info->depth_surf && info->stencil_surf) { in isl_emit_depth_stencil_hiz_s()
2459 assert(info->depth_surf == info->stencil_surf); in isl_emit_depth_stencil_hiz_s()
2462 assert(info->depth_surf->dim == info->stencil_surf->dim); in isl_emit_depth_stencil_hiz_s()
2476 if (info->stencil_surf) { in isl_emit_depth_stencil_hiz_s()
2477 assert((info->stencil_surf->usage & ISL_SURF_USAGE_STENCIL_BIT)); in isl_emit_depth_stencil_hiz_s()
2478 if (info->stencil_surf->dim == ISL_SURF_DIM_3D) { in isl_emit_depth_stencil_hiz_s()
2480 info->stencil_surf->logical_level0_px.depth); in isl_emit_depth_stencil_hiz_s()
2483 info->stencil_surf->logical_level0_px.array_len); in isl_emit_depth_stencil_hiz_s()
Disl.h1736 const struct isl_surf *stencil_surf; member
/third_party/mesa3d/src/gallium/drivers/iris/
Diris_clear.c539 struct blorp_surf stencil_surf; in clear_depth_stencil() local
576 &stencil_surf, &stencil_res->base.b, in clear_depth_stencil()
585 blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf, in clear_depth_stencil()
Diris_state.c3326 info.stencil_surf = &stencil_res->surf; in iris_set_framebuffer_state()
/third_party/mesa3d/src/gallium/drivers/crocus/
Dcrocus_clear.c567 struct blorp_surf stencil_surf; in clear_depth_stencil() local
606 &stencil_surf, &stencil_res->base.b, in clear_depth_stencil()
610 blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf, in clear_depth_stencil()
Dcrocus_state.c7508 info.stencil_surf = &sres->surf;
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_gmem.c1539 struct pipe_surface stencil_surf = *pfb->zsbuf; in emit_sysmem_clears() local
1540 stencil_surf.format = PIPE_FORMAT_S8_UINT; in emit_sysmem_clears()
1541 stencil_surf.texture = separate_stencil; in emit_sysmem_clears()
1543 fd6_clear_surface(ctx, ring, &stencil_surf, pfb->width, pfb->height, in emit_sysmem_clears()
/third_party/mesa3d/src/intel/blorp/
Dblorp_genX_exec.h1750 info.stencil_surf = &params->stencil.surf; in blorp_emit_depth_stencil_config()
1759 assert(info.stencil_surf->dim_layout == ISL_DIM_LAYOUT_GFX6_STENCIL_HIZ); in blorp_emit_depth_stencil_config()
1761 isl_surf_get_image_offset_B_tile_sa(info.stencil_surf, in blorp_emit_depth_stencil_config()
/third_party/mesa3d/src/intel/vulkan/
DgenX_cmd_buffer.c6374 info.stencil_surf = &stencil_surface->isl; in cmd_buffer_emit_depth_stencil()