Searched refs:tcc_cache_line_size (Results 1 – 12 of 12) sorted by relevance
| /third_party/mesa3d/src/amd/common/ |
| D | ac_surface_test_common.h | 44 info->tcc_cache_line_size = 64; in init_vega10()
59 info->tcc_cache_line_size = 64; in init_vega20()
75 info->tcc_cache_line_size = 64; in init_raven()
90 info->tcc_cache_line_size = 64; in init_raven2()
105 info->tcc_cache_line_size = 128; in init_navi10()
119 info->tcc_cache_line_size = 128; in init_navi14()
133 info->tcc_cache_line_size = 128; in init_gfx103()
149 info->tcc_cache_line_size = 128; in init_gfx11()
|
| D | ac_gpu_info.h | 142 uint32_t tcc_cache_line_size; member
|
| D | ac_gpu_info.c | 960 info->tcc_cache_line_size = 128; in ac_query_gpu_info()
972 info->tcc_cache_line_size = 128; in ac_query_gpu_info()
974 info->tcc_cache_line_size = 64; in ac_query_gpu_info()
1208 info->ib_alignment = MAX2(info->ib_alignment, info->tcc_cache_line_size); in ac_query_gpu_info()
1500 fprintf(f, " tcc_cache_line_size = %u\n", info->tcc_cache_line_size); in ac_print_gpu_info()
|
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_pipe.h | 1768 unsigned alignment, tcc_cache_line_size; in si_optimal_tcc_alignment() local
1776 tcc_cache_line_size = sctx->screen->info.tcc_cache_line_size; in si_optimal_tcc_alignment()
1777 return MIN2(alignment, tcc_cache_line_size); in si_optimal_tcc_alignment()
|
| D | si_pipe.c | 707 sctx->screen->info.tcc_cache_line_size); in si_create_context()
777 sscreen->info.tcc_cache_line_size); in si_create_context()
|
| D | si_buffer.c | 428 sctx->screen->info.tcc_cache_line_size, &offset, in si_buffer_transfer_map()
|
| D | si_gfx_cs.c | 634 sscreen->info.tcc_cache_line_size); in si_get_wait_mem_scratch_bo()
|
| D | si_compute.c | 734 sctx->screen->info.tcc_cache_line_size, &kernel_args_offset, in si_upload_compute_input()
|
| D | si_state_draw.cpp | 2308 sctx->screen->info.tcc_cache_line_size, in si_draw()
|
| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | r600_pipe_common.c | 163 rctx->screen->info.tcc_cache_line_size, in r600_draw_rectangle()
1307 printf("tcc_cache_line_size = %u\n", rscreen->info.tcc_cache_line_size); in r600_common_screen_init()
|
| D | r600_buffer_common.c | 396 rctx->screen->info.tcc_cache_line_size, in r600_buffer_transfer_map()
|
| /third_party/mesa3d/src/gallium/winsys/radeon/drm/ |
| D | radeon_drm_winsys.c | 566 ws->info.tcc_cache_line_size = 64; /* TC L2 line size on GCN */ in do_winsys_init()
|