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Searched refs:tcc_rb_non_coherent (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/amd/common/
Dac_gpu_info.h143 bool tcc_rb_non_coherent; /* whether L2 inv is needed for render->texture transitions */ member
Dac_gpu_info.c979 info->tcc_rb_non_coherent = !util_is_power_of_two_or_zero(info->num_tcc_blocks); in ac_query_gpu_info()
1501 fprintf(f, " tcc_rb_non_coherent = %u\n", info->tcc_rb_non_coherent); in ac_print_gpu_info()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_pipe.h1795 if (sctx->screen->info.tcc_rb_non_coherent) in si_make_CB_shader_coherent()
1820 if (sctx->screen->info.tcc_rb_non_coherent) in si_make_DB_shader_coherent()
Dsi_compute_blit.c203 if (sctx->gfx_level >= GFX10 && sctx->screen->info.tcc_rb_non_coherent) { in si_launch_grid_internal()
Dsi_state.c5362 sctx->screen->info.tcc_rb_non_coherent) in si_memory_barrier()
/third_party/mesa3d/src/amd/vulkan/
Dradv_image.c1521 return !device->physical_device->rad_info.tcc_rb_non_coherent && in radv_image_is_l2_coherent()
Dradv_cmd_buffer.c4297 !device->physical_device->rad_info.tcc_rb_non_coherent); in can_skip_buffer_l2_flushes()