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Searched refs:tcs_vgpr_only_inputs (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_internal.h172 uint64_t tcs_vgpr_only_inputs);
Dsi_shader.c1516 uint64_t tcs_vgpr_only_inputs) in si_lower_io_to_mem() argument
1524 key->ge.opt.same_patch_vertices, tcs_vgpr_only_inputs); in si_lower_io_to_mem()
1543 !(sel->info.base.inputs_read & ~sel->info.tcs_vgpr_only_inputs), in si_lower_io_to_mem()
1576 uint64_t tcs_vgpr_only_inputs) in si_get_nir_shader() argument
1690 bool opt_offsets = si_lower_io_to_mem(shader, nir, tcs_vgpr_only_inputs); in si_get_nir_shader()
Dsi_shader.h397 uint64_t tcs_vgpr_only_inputs; /* TCS inputs that are only in VGPRs, not LDS. */ member
Dsi_shader_llvm.c1032 ~shader->selector->info.tcs_vgpr_only_inputs) { in si_llvm_translate_nir()
1241 nir = si_get_nir_shader(&shader_ls, &free_nir, sel->info.tcs_vgpr_only_inputs); in si_llvm_compile_shader()
Dsi_shader_info.c797 info->tcs_vgpr_only_inputs = ~info->base.tess.tcs_cross_invocation_inputs_read & in si_nir_scan_shader()
Dsi_state_draw.cpp666 tcs->info.base.inputs_read & ~tcs->info.tcs_vgpr_only_inputs) in si_emit_derived_tess_state()
/third_party/mesa3d/docs/relnotes/
D22.2.0.rst5083 - radeonsi: add tcs_vgpr_only_inputs parameter to si_get_nir_shader