Searched refs:vgprs (Results 1 – 9 of 9) sorted by relevance
/third_party/mesa3d/src/amd/compiler/ |
D | aco_live_var_analysis.cpp | 357 uint16_t vgprs = program->dev.physical_vgprs / waves & ~(program->dev.vgpr_alloc_granule - 1); in get_addr_vgpr_from_waves() local 358 vgprs -= program->config->num_shared_vgprs / 2; in get_addr_vgpr_from_waves() 359 return std::min(vgprs, program->dev.vgpr_limit); in get_addr_vgpr_from_waves()
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D | aco_spill.cpp | 1885 std::set<Temp> vgprs; in assign_spill_slots() local 1894 vgprs.insert(pred_instr->operands[0].getTemp()); in assign_spill_slots() 1898 if (!vgprs.size()) in assign_spill_slots() 1902 aco_opcode::p_end_linear_vgpr, Format::PSEUDO, vgprs.size(), 0)}; in assign_spill_slots() 1904 for (Temp tmp : vgprs) { in assign_spill_slots()
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D | aco_register_allocation.cpp | 418 print_regs(ra_ctx& ctx, bool vgprs, RegisterFile& reg_file) in print_regs() argument 420 PhysRegInterval regs = get_reg_bounds(ctx.program, vgprs ? RegType::vgpr : RegType::sgpr); in print_regs() 421 char reg_char = vgprs ? 'v' : 's'; in print_regs()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SISchedule.td | 142 // need to consume 2 or 4 more vgprs to be initialized before the acc
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/third_party/mesa3d/src/amd/vulkan/ |
D | radv_shader.c | 2672 unsigned vgprs = align(conf->num_vgprs, wave_size == 32 ? 8 : 4); local 2674 vgprs = align(vgprs, wave_size == 32 ? 16 : 8); 2675 max_simd_waves = MIN2(max_simd_waves, physical_vgprs / vgprs);
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/third_party/mesa3d/docs/relnotes/ |
D | 19.3.0.rst | 2857 - radv: round vgprs/sgprs before calculating max_waves 2868 - aco: don't propagate vgprs into v_readlane/v_writelane
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D | 20.0.0.rst | 2768 - aco: don't propagate vgprs into v_readlane/v_writelane
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D | 21.3.0.rst | 3595 - aco: allow live-range splits of linear vgprs in top-level blocks
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D | 20.2.0.rst | 3800 - aco: fix consecutively written vgprs from vmem instructions
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