Searched full:combophy (Results 1 – 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | intel,combo-phy.yaml | 7 title: Intel ComboPhy Subsystem
13 Intel Combophy subsystem supports PHYs for PCIe, EMAC and SATA
14 controllers. A single Combophy provides two PHY instances.
18 pattern: "combophy(@.*|-[0-9a-f])*$"
22 - const: intel,combophy-lgm
30 - description: ComboPhy core registers
50 description: Chip configuration registers handle and ComboPhy instance id
54 description: HSIO registers handle and ComboPhy instance id on NOC
59 Specify the flag to configure ComboPHY in dual lane mode.
64 Mode of the two phys in ComboPhy.
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| D | calxeda-combophy.yaml | 4 $id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#
22 const: calxeda,hb-combophy
31 description: device ID for programming the ComboPHY.
46 compatible = "calxeda,hb-combophy";
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| /kernel/linux/linux-5.10/drivers/phy/intel/ |
| D | Kconfig | 18 bool "Intel Lightning Mountain ComboPHY driver"
25 Enable this to support Intel ComboPhy.
27 This driver configures ComboPhy subsystem on Intel gateway
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| D | phy-intel-lgm-combo.c | 55 * for ComboPhy according to the mode.
63 /* ComboPhy mode Register values */
233 dev_err(dev, "Failed to set ComboPhy mode: %d\n", ret); in intel_cbphy_set_mode()
465 * in which ComboPhy subsytem specific registers are subset. Using in intel_cbphy_fwnode_parse()
543 dev_err(dev, "Invalid. ComboPhy is in Dual lane mode %d\n", iphy_id); in intel_cbphy_xlate()
618 { .compatible = "intel,combophy-lgm" },
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/ |
| D | sata_highbank.yaml | 49 phandle-combophy and lane assignment, which maps each SATA port to a
50 combophy and a lane within that combophy
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | ecx-common.dtsi | 218 compatible = "calxeda,hb-combophy";
225 compatible = "calxeda,hb-combophy";
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