Lines Matching +full:protected +full:- +full:clocks
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
113 if (!core->rpm_enabled)
116 ret = pm_runtime_get_sync(core->dev);
118 pm_runtime_put_noidle(core->dev);
126 if (!core->rpm_enabled)
129 pm_runtime_put_sync(core->dev);
153 if (--prepare_refcnt)
193 if (--enable_refcnt) {
203 return core->protect_count;
211 * .is_prepared is optional for clocks that can prepare
214 if (!core->ops->is_prepared)
215 return core->prepare_count;
218 ret = core->ops->is_prepared(core->hw);
230 * .is_enabled is only mandatory for clocks that gate
233 if (!core->ops->is_enabled)
234 return core->enable_count;
246 if (core->rpm_enabled) {
247 pm_runtime_get_noresume(core->dev);
248 if (!pm_runtime_active(core->dev)) {
259 if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent)
260 if (!clk_core_is_enabled(core->parent)) {
265 ret = core->ops->is_enabled(core->hw);
267 if (core->rpm_enabled)
268 pm_runtime_put(core->dev);
277 return !clk ? NULL : clk->core->name;
283 return hw->core->name;
289 return !clk ? NULL : clk->core->hw;
295 return hw->core->num_parents;
301 return hw->core->parent ? hw->core->parent->hw : NULL;
311 if (!strcmp(core->name, name))
314 hlist_for_each_entry(child, &core->children, child_node) {
358 return -ENOENT;
363 return ERR_PTR(-ENOENT);
368 * clk_core_get - Find the clk_core parent of a clk
375 * node's 'clock-names' property or as the 'con_id' matching the device's
380 * clock-controller@c001 that has a clk_init_data::parent_data array
382 * clock-controller@f00abcd without needing to get the globally unique name of
385 * parent: clock-controller@f00abcd {
387 * #clock-cells = <0>;
390 * clock-controller@c001 {
392 * clocks = <&parent>;
393 * clock-names = "xtal";
394 * #clock-cells = <1>;
397 * Returns: -ENOENT when the provider can't be found or the clk doesn't
405 const char *name = core->parents[p_index].fw_name;
406 int index = core->parents[p_index].index;
407 struct clk_hw *hw = ERR_PTR(-ENOENT);
408 struct device *dev = core->dev;
410 struct device_node *np = core->of_node;
428 return hw->core;
433 struct clk_parent_map *entry = &core->parents[index];
434 struct clk_core *parent = ERR_PTR(-ENOENT);
436 if (entry->hw) {
437 parent = entry->hw->core;
444 parent = ERR_PTR(-EPROBE_DEFER);
447 if (PTR_ERR(parent) == -ENOENT && entry->name)
448 parent = clk_core_lookup(entry->name);
453 entry->core = parent;
459 if (!core || index >= core->num_parents || !core->parents)
462 if (!core->parents[index].core)
465 return core->parents[index].core;
473 parent = clk_core_get_parent_by_index(hw->core, index);
475 return !parent ? NULL : parent->hw;
481 return !clk ? 0 : clk->core->enable_count;
489 if (!core->num_parents || core->parent)
490 return core->rate;
502 return clk_core_get_rate_nolock(hw->core);
511 return core->accuracy;
516 return hw->core->flags;
522 return clk_core_is_prepared(hw->core);
528 return clk_core_rate_is_protected(hw->core);
534 return clk_core_is_enabled(hw->core);
543 return clk_core_is_enabled(clk->core);
551 return abs(now - rate) < abs(best - rate);
560 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
566 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
567 parent = core->parent;
568 if (core->flags & CLK_SET_RATE_PARENT) {
569 ret = __clk_determine_rate(parent ? parent->hw : NULL,
585 num_parents = core->num_parents;
591 if (core->flags & CLK_SET_RATE_PARENT) {
593 ret = __clk_determine_rate(parent->hw, &parent_req);
600 if (mux_is_better_rate(req->rate, parent_req.rate,
608 return -EINVAL;
612 req->best_parent_hw = best_parent->hw;
613 req->best_parent_rate = best;
614 req->rate = best;
624 return !core ? NULL : core->hw->clk;
635 *min_rate = core->min_rate;
636 *max_rate = core->max_rate;
638 hlist_for_each_entry(clk_user, &core->clks, clks_node)
639 *min_rate = max(*min_rate, clk_user->min_rate);
641 hlist_for_each_entry(clk_user, &core->clks, clks_node)
642 *max_rate = min(*max_rate, clk_user->max_rate);
653 if (min_rate > core->max_rate || max_rate < core->min_rate)
656 hlist_for_each_entry(user, &core->clks, clks_node)
657 if (min_rate > user->max_rate || max_rate < user->min_rate)
666 hw->core->min_rate = min_rate;
667 hw->core->max_rate = max_rate;
672 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
680 * Returns: 0 on success, -EERROR value on error
705 if (WARN(core->protect_count == 0,
706 "%s already unprotected\n", core->name))
709 if (--core->protect_count > 0)
712 clk_core_rate_unprotect(core->parent);
722 return -EINVAL;
724 if (core->protect_count == 0)
727 ret = core->protect_count;
728 core->protect_count = 1;
735 * clk_rate_exclusive_put - release exclusivity over clock rate control
740 * clock which could result in a rate change or rate glitch. Exclusive clocks
742 * further up the parent chain of clocks. As a result, clocks up parent chain
763 if (WARN_ON(clk->exclusive_count <= 0))
766 clk_core_rate_unprotect(clk->core);
767 clk->exclusive_count--;
780 if (core->protect_count == 0)
781 clk_core_rate_protect(core->parent);
783 core->protect_count++;
797 core->protect_count = count;
801 * clk_rate_exclusive_get - get exclusivity over the clk rate control
806 * clock which could result in a rate change or rate glitch. Exclusive clocks
808 * further up the parent chain of clocks. As a result, clocks up parent chain
816 * Returns 0 on success, -EERROR otherwise
824 clk_core_rate_protect(clk->core);
825 clk->exclusive_count++;
839 if (WARN(core->prepare_count == 0,
840 "%s already unprepared\n", core->name))
843 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
844 "Unpreparing critical %s\n", core->name))
847 if (core->flags & CLK_SET_RATE_GATE)
850 if (--core->prepare_count > 0)
853 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
857 if (core->ops->unprepare)
858 core->ops->unprepare(core->hw);
861 clk_core_unprepare(core->parent);
873 * clk_unprepare - undo preparation of a clock source
888 clk_core_unprepare_lock(clk->core);
901 if (core->prepare_count == 0) {
906 ret = clk_core_prepare(core->parent);
912 if (core->ops->prepare)
913 ret = core->ops->prepare(core->hw);
921 core->prepare_count++;
930 if (core->flags & CLK_SET_RATE_GATE)
935 clk_core_unprepare(core->parent);
953 * clk_prepare - prepare a clock source
962 * Returns 0 on success, -EERROR otherwise.
969 return clk_core_prepare_lock(clk->core);
980 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
983 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
984 "Disabling critical %s\n", core->name))
987 if (--core->enable_count > 0)
992 if (core->ops->disable)
993 core->ops->disable(core->hw);
997 clk_core_disable(core->parent);
1010 * clk_disable - gate a clock
1016 * SoC-internal clk which is controlled via simple register writes. In the
1026 clk_core_disable_lock(clk->core);
1039 if (WARN(core->prepare_count == 0,
1040 "Enabling unprepared %s\n", core->name))
1041 return -ESHUTDOWN;
1043 if (core->enable_count == 0) {
1044 ret = clk_core_enable(core->parent);
1051 if (core->ops->enable)
1052 ret = core->ops->enable(core->hw);
1057 clk_core_disable(core->parent);
1062 core->enable_count++;
1079 * clk_gate_restore_context - restore context for poweroff
1083 * the gate clocks based on the enable_count. This is done in cases
1086 * helps restore the state of gate clocks.
1090 struct clk_core *core = hw->core;
1092 if (core->enable_count)
1093 core->ops->enable(hw);
1095 core->ops->disable(hw);
1104 hlist_for_each_entry(child, &core->children, child_node) {
1110 if (core->ops && core->ops->save_context)
1111 ret = core->ops->save_context(core->hw);
1120 if (core->ops && core->ops->restore_context)
1121 core->ops->restore_context(core->hw);
1123 hlist_for_each_entry(child, &core->children, child_node)
1128 * clk_save_context - save clock context for poweroff
1156 * clk_restore_context - restore clock context after poweroff
1174 * clk_enable - ungate a clock
1179 * if the operation will never sleep. One example is a SoC-internal clk which
1183 * must be called before clk_enable. Returns 0 on success, -EERROR
1191 return clk_core_enable_lock(clk->core);
1222 hlist_for_each_entry(child, &core->children, child_node)
1225 if (core->prepare_count)
1228 if (core->flags & CLK_IGNORE_UNUSED)
1236 if (core->ops->unprepare_unused)
1237 core->ops->unprepare_unused(core->hw);
1238 else if (core->ops->unprepare)
1239 core->ops->unprepare(core->hw);
1253 hlist_for_each_entry(child, &core->children, child_node)
1256 if (core->flags & CLK_OPS_PARENT_ENABLE)
1257 clk_core_prepare_enable(core->parent);
1264 if (core->enable_count)
1267 if (core->flags & CLK_IGNORE_UNUSED)
1271 * some gate clocks have special needs during the disable-unused
1277 if (core->ops->disable_unused)
1278 core->ops->disable_unused(core->hw);
1279 else if (core->ops->disable)
1280 core->ops->disable(core->hw);
1288 if (core->flags & CLK_OPS_PARENT_ENABLE)
1289 clk_core_disable_unprepare(core->parent);
1305 pr_warn("clk: Not disabling unused clocks\n");
1341 * - if the provider is not protected at all
1342 * - if the calling consumer is the only one which has exclusivity
1346 req->rate = core->rate;
1347 } else if (core->ops->determine_rate) {
1348 return core->ops->determine_rate(core->hw, req);
1349 } else if (core->ops->round_rate) {
1350 rate = core->ops->round_rate(core->hw, req->rate,
1351 &req->best_parent_rate);
1355 req->rate = rate;
1357 return -EINVAL;
1371 parent = core->parent;
1373 req->best_parent_hw = parent->hw;
1374 req->best_parent_rate = parent->rate;
1376 req->best_parent_hw = NULL;
1377 req->best_parent_rate = 0;
1383 return core->ops->determine_rate || core->ops->round_rate;
1392 req->rate = 0;
1400 else if (core->flags & CLK_SET_RATE_PARENT)
1401 return clk_core_round_rate_nolock(core->parent, req);
1403 req->rate = core->rate;
1408 * __clk_determine_rate - get the closest rate actually supported by a clock
1417 req->rate = 0;
1421 return clk_core_round_rate_nolock(hw->core, req);
1426 * clk_hw_round_rate() - round the given rate for a hw clk
1445 clk_core_get_boundaries(hw->core, &req.min_rate, &req.max_rate);
1448 ret = clk_core_round_rate_nolock(hw->core, &req);
1457 * clk_round_rate - round the given rate for a clk
1475 if (clk->exclusive_count)
1476 clk_core_rate_unprotect(clk->core);
1478 clk_core_get_boundaries(clk->core, &req.min_rate, &req.max_rate);
1481 ret = clk_core_round_rate_nolock(clk->core, &req);
1483 if (clk->exclusive_count)
1484 clk_core_rate_protect(clk->core);
1496 * __clk_notify - call clk notifier chain
1502 * Triggers a notifier call chain on the clk rate-change notification
1520 if (cn->clk->core == core) {
1521 cnd.clk = cn->clk;
1522 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1548 if (core->parent)
1549 parent_accuracy = core->parent->accuracy;
1551 if (core->ops->recalc_accuracy)
1552 core->accuracy = core->ops->recalc_accuracy(core->hw,
1555 core->accuracy = parent_accuracy;
1557 hlist_for_each_entry(child, &core->children, child_node)
1563 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1570 * clk_get_accuracy - return the accuracy of clk
1586 accuracy = clk_core_get_accuracy_recalc(clk->core);
1598 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1599 rate = core->ops->recalc_rate(core->hw, parent_rate);
1625 old_rate = core->rate;
1627 if (core->parent)
1628 parent_rate = core->parent->rate;
1630 core->rate = clk_recalc(core, parent_rate);
1636 if (core->notifier_count && msg)
1637 __clk_notify(core, msg, old_rate, core->rate);
1639 hlist_for_each_entry(child, &core->children, child_node)
1645 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1652 * clk_get_rate - return the rate of clk
1667 rate = clk_core_get_rate_recalc(clk->core);
1680 return -EINVAL;
1682 for (i = 0; i < core->num_parents; i++) {
1684 if (core->parents[i].core == parent)
1688 if (core->parents[i].core)
1692 if (core->parents[i].hw) {
1693 if (core->parents[i].hw == parent->hw)
1705 if (core->parents[i].name &&
1706 !strcmp(parent->name, core->parents[i].name))
1710 if (i == core->num_parents)
1711 return -EINVAL;
1713 core->parents[i].core = parent;
1718 * clk_hw_get_parent_index - return the index of the parent clock
1721 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1729 return -EINVAL;
1731 return clk_fetch_parent_index(hw->core, parent->core);
1742 core->orphan = is_orphan;
1744 hlist_for_each_entry(child, &core->children, child_node)
1750 bool was_orphan = core->orphan;
1752 hlist_del(&core->child_node);
1755 bool becomes_orphan = new_parent->orphan;
1758 if (new_parent->new_child == core)
1759 new_parent->new_child = NULL;
1761 hlist_add_head(&core->child_node, &new_parent->children);
1766 hlist_add_head(&core->child_node, &clk_orphan_list);
1771 core->parent = new_parent;
1778 struct clk_core *old_parent = core->parent;
1801 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1807 if (core->prepare_count) {
1828 if (core->prepare_count) {
1833 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
1834 if (core->flags & CLK_OPS_PARENT_ENABLE) {
1852 if (parent && core->ops->set_parent)
1853 ret = core->ops->set_parent(core->hw, p_index);
1880 * pre-rate change notifications and returns early if no clks in the
1897 if (core->notifier_count)
1898 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
1902 __func__, core->name, ret);
1906 hlist_for_each_entry(child, &core->children, child_node) {
1921 core->new_rate = new_rate;
1922 core->new_parent = new_parent;
1923 core->new_parent_index = p_index;
1925 core->new_child = NULL;
1926 if (new_parent && new_parent != core->parent)
1927 new_parent->new_child = core;
1929 hlist_for_each_entry(child, &core->children, child_node) {
1930 child->new_rate = clk_recalc(child, new_rate);
1931 clk_calc_subtree(child, child->new_rate, NULL, 0);
1956 parent = old_parent = core->parent;
1958 best_parent_rate = parent->rate;
1978 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
1982 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
1983 /* pass-through clock without adjustable parent */
1984 core->new_rate = core->rate;
1987 /* pass-through clock with adjustable parent */
1989 new_rate = parent->new_rate;
1993 /* some clocks must be gated to change parent */
1995 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
1997 __func__, core->name);
2002 if (parent && core->num_parents > 1) {
2006 __func__, parent->name, core->name);
2011 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
2012 best_parent_rate != parent->rate)
2032 if (core->rate == core->new_rate)
2035 if (core->notifier_count) {
2036 ret = __clk_notify(core, event, core->rate, core->new_rate);
2041 hlist_for_each_entry(child, &core->children, child_node) {
2043 if (child->new_parent && child->new_parent != core)
2050 /* handle the new child who might not be in core->children yet */
2051 if (core->new_child) {
2052 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2074 old_rate = core->rate;
2076 if (core->new_parent) {
2077 parent = core->new_parent;
2078 best_parent_rate = core->new_parent->rate;
2079 } else if (core->parent) {
2080 parent = core->parent;
2081 best_parent_rate = core->parent->rate;
2087 if (core->flags & CLK_SET_RATE_UNGATE) {
2096 if (core->new_parent && core->new_parent != core->parent) {
2097 old_parent = __clk_set_parent_before(core, core->new_parent);
2098 trace_clk_set_parent(core, core->new_parent);
2100 if (core->ops->set_rate_and_parent) {
2102 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2104 core->new_parent_index);
2105 } else if (core->ops->set_parent) {
2106 core->ops->set_parent(core->hw, core->new_parent_index);
2109 trace_clk_set_parent_complete(core, core->new_parent);
2110 __clk_set_parent_after(core, core->new_parent, old_parent);
2113 if (core->flags & CLK_OPS_PARENT_ENABLE)
2116 trace_clk_set_rate(core, core->new_rate);
2118 if (!skip_set_rate && core->ops->set_rate)
2119 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
2121 trace_clk_set_rate_complete(core, core->new_rate);
2123 core->rate = clk_recalc(core, best_parent_rate);
2125 if (core->flags & CLK_SET_RATE_UNGATE) {
2134 if (core->flags & CLK_OPS_PARENT_ENABLE)
2137 if (core->notifier_count && old_rate != core->rate)
2138 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
2140 if (core->flags & CLK_RECALC_NEW_RATES)
2141 (void)clk_calc_new_rates(core, core->new_rate);
2147 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2149 if (child->new_parent && child->new_parent != core)
2154 /* handle the new child who might not be in core->children yet */
2155 if (core->new_child)
2156 clk_change_rate(core->new_child);
2204 /* fail on a direct rate set of a protected provider */
2206 return -EBUSY;
2211 return -EINVAL;
2221 fail_clk->name);
2223 ret = -EBUSY;
2230 core->req_rate = req_rate;
2238 * clk_set_rate - specify a new rate for clk
2254 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2256 * Returns 0 on success, -EERROR otherwise.
2268 if (clk->exclusive_count)
2269 clk_core_rate_unprotect(clk->core);
2271 ret = clk_core_set_rate_nolock(clk->core, rate);
2273 if (clk->exclusive_count)
2274 clk_core_rate_protect(clk->core);
2283 * clk_set_rate_exclusive - specify a new rate and get exclusive control
2299 * Returns 0 on success, -EERROR otherwise.
2317 ret = clk_core_set_rate_nolock(clk->core, rate);
2319 clk_core_rate_protect(clk->core);
2320 clk->exclusive_count++;
2330 * clk_set_rate_range - set a rate range for a clock source
2347 __func__, clk->core->name, clk->dev_id, clk->con_id,
2349 return -EINVAL;
2354 if (clk->exclusive_count)
2355 clk_core_rate_unprotect(clk->core);
2358 old_min = clk->min_rate;
2359 old_max = clk->max_rate;
2360 clk->min_rate = min;
2361 clk->max_rate = max;
2363 if (!clk_core_check_boundaries(clk->core, min, max)) {
2364 ret = -EINVAL;
2368 rate = clk_core_get_rate_nolock(clk->core);
2375 * usual reason (clock broken, clock protected, etc) but also
2377 * - round_rate() was not favorable and fell on the wrong
2379 * - the determine_rate() callback does not really check for
2388 ret = clk_core_set_rate_nolock(clk->core, rate);
2391 clk->min_rate = old_min;
2392 clk->max_rate = old_max;
2397 if (clk->exclusive_count)
2398 clk_core_rate_protect(clk->core);
2407 * clk_set_min_rate - set a minimum clock rate for a clock source
2418 return clk_set_rate_range(clk, rate, clk->max_rate);
2423 * clk_set_max_rate - set a maximum clock rate for a clock source
2434 return clk_set_rate_range(clk, clk->min_rate, rate);
2439 * clk_get_parent - return the parent of a clk
2442 * Simply returns clk->parent. Returns NULL if clk is NULL.
2452 /* TODO: Create a per-user clk and change callers to call clk_put */
2453 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2464 if (core->num_parents > 1 && core->ops->get_parent)
2465 index = core->ops->get_parent(core->hw);
2483 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2487 * clk_has_parent - check if a clock is a possible parent for another
2501 /* NULL clocks should be nops, so return success if either is NULL. */
2505 core = clk->core;
2506 parent_core = parent->core;
2509 if (core->parent == parent_core)
2512 for (i = 0; i < core->num_parents; i++)
2513 if (!strcmp(core->parents[i].name, parent_core->name))
2532 if (core->parent == parent)
2535 /* verify ops for multi-parent clks */
2536 if (core->num_parents > 1 && !core->ops->set_parent)
2537 return -EPERM;
2539 /* check that we are allowed to re-parent if the clock is in use */
2540 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2541 return -EBUSY;
2544 return -EBUSY;
2551 __func__, parent->name, core->name);
2554 p_rate = parent->rate;
2568 /* do the re-parent */
2587 return clk_core_set_parent_nolock(hw->core, parent->core);
2592 * clk_set_parent - switch the parent of a mux clk
2596 * Re-parent clk to use parent as its new input source. If clk is in
2606 * Returns 0 on success, -EERROR otherwise.
2617 if (clk->exclusive_count)
2618 clk_core_rate_unprotect(clk->core);
2620 ret = clk_core_set_parent_nolock(clk->core,
2621 parent ? parent->core : NULL);
2623 if (clk->exclusive_count)
2624 clk_core_rate_protect(clk->core);
2634 int ret = -EINVAL;
2642 return -EBUSY;
2646 if (core->ops->set_phase) {
2647 ret = core->ops->set_phase(core->hw, degrees);
2649 core->phase = degrees;
2658 * clk_set_phase - adjust the phase shift of a clock signal
2663 * degrees. Returns 0 on success, -EERROR otherwise.
2667 * phase locked-loop clock signal generators we may shift phase with
2691 if (clk->exclusive_count)
2692 clk_core_rate_unprotect(clk->core);
2694 ret = clk_core_set_phase_nolock(clk->core, degrees);
2696 if (clk->exclusive_count)
2697 clk_core_rate_protect(clk->core);
2710 if (!core->ops->get_phase)
2714 ret = core->ops->get_phase(core->hw);
2716 core->phase = ret;
2722 * clk_get_phase - return the phase shift of a clock signal
2726 * -EERROR.
2736 ret = clk_core_get_phase(clk->core);
2746 core->duty.num = 1;
2747 core->duty.den = 2;
2754 struct clk_duty *duty = &core->duty;
2757 if (!core->ops->get_duty_cycle)
2760 ret = core->ops->get_duty_cycle(core->hw, duty);
2765 if (duty->den == 0 || duty->num > duty->den) {
2766 ret = -EINVAL;
2781 if (core->parent &&
2782 core->flags & CLK_DUTY_CYCLE_PARENT) {
2783 ret = clk_core_update_duty_cycle_nolock(core->parent);
2784 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2803 return -EBUSY;
2807 if (!core->ops->set_duty_cycle)
2810 ret = core->ops->set_duty_cycle(core->hw, duty);
2812 memcpy(&core->duty, duty, sizeof(*duty));
2824 if (core->parent &&
2825 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
2826 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
2827 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
2834 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
2854 return -EINVAL;
2861 if (clk->exclusive_count)
2862 clk_core_rate_unprotect(clk->core);
2864 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
2866 if (clk->exclusive_count)
2867 clk_core_rate_protect(clk->core);
2878 struct clk_duty *duty = &core->duty;
2885 ret = mult_frac(scale, duty->num, duty->den);
2893 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
2905 return clk_core_get_scaled_duty_cycle(clk->core, scale);
2910 * clk_is_match - check if two clk's point to the same hardware clock
2926 /* true if clk->core pointers match. Avoid dereferencing garbage */
2928 if (p->core == q->core)
2955 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ",
2957 30 - level * 3, c->name,
2958 c->enable_count, c->prepare_count, c->protect_count,
2966 seq_puts(s, "-----");
2978 hlist_for_each_entry(child, &c->children, child_node)
2985 struct hlist_head **lists = (struct hlist_head **)s->private;
2989 seq_puts(s, "---------------------------------------------------------------------------------------------\n");
3011 seq_printf(s, "\"%s\": { ", c->name);
3012 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
3013 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
3014 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
3032 hlist_for_each_entry(child, &c->children, child_node) {
3044 struct hlist_head **lists = (struct hlist_head **)s->private;
3092 ret = clk_prepare_enable(core->hw->clk);
3094 clk_disable_unprepare(core->hw->clk);
3103 *val = core->enable_count && core->prepare_count;
3119 *val = core->rate;
3147 struct clk_core *core = s->private;
3148 unsigned long flags = core->flags;
3177 * 4. Fetch parent clock's clock-output-name if DT index was set
3185 seq_puts(s, parent->name);
3186 else if (core->parents[i].name)
3187 seq_puts(s, core->parents[i].name);
3188 else if (core->parents[i].fw_name)
3189 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3190 else if (core->parents[i].index >= 0)
3192 of_clk_get_parent_name(core->of_node,
3193 core->parents[i].index));
3202 struct clk_core *core = s->private;
3205 for (i = 0; i < core->num_parents - 1; i++)
3216 struct clk_core *core = s->private;
3218 if (core->parent)
3219 seq_printf(s, "%s\n", core->parent->name);
3227 struct clk_core *core = s->private;
3228 struct clk_duty *duty = &core->duty;
3230 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3238 struct clk_core *core = s->private;
3252 struct clk_core *core = s->private;
3271 root = debugfs_create_dir(core->name, pdentry);
3272 core->dentry = root;
3278 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3279 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
3281 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3282 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3283 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3284 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
3292 if (core->num_parents > 0)
3296 if (core->num_parents > 1)
3300 if (core->ops->debug_init)
3301 core->ops->debug_init(core->hw, core->dentry);
3305 * clk_debug_register - add a clk node to the debugfs clk directory
3315 hlist_add_head(&core->debug_node, &clk_debug_list);
3322 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3326 * debugfs clk directory if clk->dentry points to debugfs created by
3332 hlist_del_init(&core->debug_node);
3333 debugfs_remove_recursive(core->dentry);
3334 core->dentry = NULL;
3339 * clk_debug_init - lazily populate the debugfs clk directory
3343 * populates the debugfs clk directory once at boot-time when we know that
3344 * debugfs is setup. It should only be called once at boot-time, all other clks
3403 * walk the list of orphan clocks and reparent any that newly finds a
3412 * clock. This is important for CLK_IS_CRITICAL clocks, which
3430 * 'req_rate' is set to something non-zero so that
3433 orphan->req_rate = orphan->rate;
3439 * __clk_core_init - initialize the data structures in a struct clk_core
3453 return -EINVAL;
3458 * Set hw->core after grabbing the prepare_lock to synchronize with
3459 * callers of clk_core_fill_parent_index() where we treat hw->core
3463 core->hw->core = core;
3470 if (clk_core_lookup(core->name)) {
3472 __func__, core->name);
3473 ret = -EEXIST;
3477 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
3478 if (core->ops->set_rate &&
3479 !((core->ops->round_rate || core->ops->determine_rate) &&
3480 core->ops->recalc_rate)) {
3482 __func__, core->name);
3483 ret = -EINVAL;
3487 if (core->ops->set_parent && !core->ops->get_parent) {
3489 __func__, core->name);
3490 ret = -EINVAL;
3494 if (core->num_parents > 1 && !core->ops->get_parent) {
3496 __func__, core->name);
3497 ret = -EINVAL;
3501 if (core->ops->set_rate_and_parent &&
3502 !(core->ops->set_parent && core->ops->set_rate)) {
3504 __func__, core->name);
3505 ret = -EINVAL;
3510 * optional platform-specific magic
3523 if (core->ops->init) {
3524 ret = core->ops->init(core->hw);
3529 parent = core->parent = __clk_init_parent(core);
3532 * Populate core->parent if parent has already been clk_core_init'd. If
3538 * clocks and re-parent any that are children of the clock currently
3542 hlist_add_head(&core->child_node, &parent->children);
3543 core->orphan = parent->orphan;
3544 } else if (!core->num_parents) {
3545 hlist_add_head(&core->child_node, &clk_root_list);
3546 core->orphan = false;
3548 hlist_add_head(&core->child_node, &clk_orphan_list);
3549 core->orphan = true;
3554 * .recalc_accuracy. For simple clocks and lazy developers the default
3559 if (core->ops->recalc_accuracy)
3560 core->accuracy = core->ops->recalc_accuracy(core->hw,
3563 core->accuracy = parent->accuracy;
3565 core->accuracy = 0;
3576 core->name);
3587 * simple clocks and lazy developers the default fallback is to use the
3591 if (core->ops->recalc_rate)
3592 rate = core->ops->recalc_rate(core->hw,
3595 rate = parent->rate;
3598 core->rate = core->req_rate = rate;
3601 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3603 * reparenting clocks
3605 if (core->flags & CLK_IS_CRITICAL) {
3611 __func__, core->name);
3620 __func__, core->name);
3629 kref_init(&core->ref);
3634 hlist_del_init(&core->child_node);
3635 core->hw->core = NULL;
3647 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3654 hlist_add_head(&clk->clks_node, &core->clks);
3659 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3665 hlist_del(&clk->clks_node);
3669 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3683 return ERR_PTR(-ENOMEM);
3685 clk->core = core;
3686 clk->dev_id = dev_id;
3687 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
3688 clk->max_rate = ULONG_MAX;
3694 * free_clk - Free a clk consumer
3702 kfree_const(clk->con_id);
3728 core = hw->core;
3732 clk->dev = dev;
3734 if (!try_module_get(core->owner)) {
3736 return ERR_PTR(-ENOENT);
3739 kref_get(&core->ref);
3751 return -EINVAL;
3757 return -ENOMEM;
3765 u8 num_parents = init->num_parents;
3766 const char * const *parent_names = init->parent_names;
3767 const struct clk_hw **parent_hws = init->parent_hws;
3768 const struct clk_parent_data *parent_data = init->parent_data;
3776 * Avoid unnecessary string look-ups of clk_core's possible parents by
3780 core->parents = parents;
3782 return -ENOMEM;
3786 parent->index = -1;
3791 __func__, core->name);
3792 ret = clk_cpy_name(&parent->name, parent_names[i],
3795 parent->hw = parent_data[i].hw;
3796 parent->index = parent_data[i].index;
3797 ret = clk_cpy_name(&parent->fw_name,
3800 ret = clk_cpy_name(&parent->name,
3804 parent->hw = parent_hws[i];
3806 ret = -EINVAL;
3814 } while (--i >= 0);
3826 int i = core->num_parents;
3828 if (!core->num_parents)
3831 while (--i >= 0) {
3832 kfree_const(core->parents[i].name);
3833 kfree_const(core->parents[i].fw_name);
3836 kfree(core->parents);
3844 const struct clk_init_data *init = hw->init;
3849 * we catch use of hw->init early on in the core.
3851 hw->init = NULL;
3855 ret = -ENOMEM;
3859 core->name = kstrdup_const(init->name, GFP_KERNEL);
3860 if (!core->name) {
3861 ret = -ENOMEM;
3865 if (WARN_ON(!init->ops)) {
3866 ret = -EINVAL;
3869 core->ops = init->ops;
3872 core->rpm_enabled = true;
3873 core->dev = dev;
3874 core->of_node = np;
3875 if (dev && dev->driver)
3876 core->owner = dev->driver->owner;
3877 core->hw = hw;
3878 core->flags = init->flags;
3879 core->num_parents = init->num_parents;
3880 core->min_rate = 0;
3881 core->max_rate = ULONG_MAX;
3887 INIT_HLIST_HEAD(&core->clks);
3893 hw->clk = alloc_clk(core, NULL, NULL);
3894 if (IS_ERR(hw->clk)) {
3895 ret = PTR_ERR(hw->clk);
3899 clk_core_link_consumer(core, hw->clk);
3903 return hw->clk;
3906 clk_core_unlink_consumer(hw->clk);
3909 free_clk(hw->clk);
3910 hw->clk = NULL;
3916 kfree_const(core->name);
3924 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
3928 * @dev->parent if dev doesn't have a device node, or NULL if neither
3929 * @dev or @dev->parent have a device node.
3940 np = dev_of_node(dev->parent);
3946 * clk_register - allocate a new clock, register it and return an opaque cookie
3948 * @hw: link to hardware-specific clock data
3965 * clk_hw_register - register a clk_hw and return an error code
3967 * @hw: link to hardware-specific clock data
3982 * of_clk_hw_register - register a clk_hw and return an error code
3984 * @hw: link to hardware-specific clock data
4006 kfree_const(core->name);
4011 * Empty clk_ops for unregistered clocks. These are used temporarily
4017 return -ENXIO;
4028 return -ENXIO;
4033 return -ENXIO;
4051 for (i = 0; i < root->num_parents; i++)
4052 if (root->parents[i].core == target)
4053 root->parents[i].core = NULL;
4055 hlist_for_each_entry(child, &root->children, child_node)
4074 * clk_unregister - unregister a currently registered clock
4085 clk_debug_unregister(clk->core);
4089 ops = clk->core->ops;
4092 clk->core->name);
4100 clk->core->ops = &clk_nodrv_ops;
4103 if (ops->terminate)
4104 ops->terminate(clk->core->hw);
4106 if (!hlist_empty(&clk->core->children)) {
4111 hlist_for_each_entry_safe(child, t, &clk->core->children,
4116 clk_core_evict_parent_cache(clk->core);
4118 hlist_del_init(&clk->core->child_node);
4120 if (clk->core->prepare_count)
4122 __func__, clk->core->name);
4124 if (clk->core->protect_count)
4125 pr_warn("%s: unregistering protected clock: %s\n",
4126 __func__, clk->core->name);
4128 kref_put(&clk->core->ref, __clk_release);
4136 * clk_hw_unregister - unregister a currently registered clk_hw
4137 * @hw: hardware-specific clock data to unregister
4141 clk_unregister(hw->clk);
4156 * devm_clk_register - resource managed clk_register()
4158 * @hw: link to hardware-specific clock data
4162 * Clocks returned from this function are automatically clk_unregister()ed on
4172 return ERR_PTR(-ENOMEM);
4187 * devm_clk_hw_register - resource managed clk_hw_register()
4189 * @hw: link to hardware-specific clock data
4191 * Managed clk_hw_register(). Clocks registered by this function are
4202 return -ENOMEM;
4234 * devm_clk_unregister - resource managed clk_unregister()
4249 * devm_clk_hw_unregister - resource managed clk_hw_unregister()
4250 * @dev: device that is unregistering the hardware-specific clock data
4251 * @hw: link to hardware-specific clock data
4282 if (WARN_ON(clk->exclusive_count)) {
4284 clk->core->protect_count -= (clk->exclusive_count - 1);
4285 clk_core_rate_unprotect(clk->core);
4286 clk->exclusive_count = 0;
4289 hlist_del(&clk->clks_node);
4290 if (clk->min_rate > clk->core->req_rate ||
4291 clk->max_rate < clk->core->req_rate)
4292 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
4294 owner = clk->core->owner;
4295 kref_put(&clk->core->ref, __clk_release);
4307 * clk_notifier_register - add a clk rate change notifier
4314 * re-enter into the clk framework by calling any top-level clk APIs;
4321 * clk_notifier_register() must be called from non-atomic context.
4322 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4329 int ret = -ENOMEM;
4332 return -EINVAL;
4338 if (cn->clk == clk)
4346 cn->clk = clk;
4347 srcu_init_notifier_head(&cn->notifier_head);
4349 list_add(&cn->node, &clk_notifier_list);
4352 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4354 clk->core->notifier_count++;
4364 * clk_notifier_unregister - remove a clk rate change notifier
4371 * Returns -EINVAL if called with null arguments; otherwise, passes
4377 int ret = -ENOENT;
4380 return -EINVAL;
4385 if (cn->clk == clk) {
4386 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4388 clk->core->notifier_count--;
4391 if (!cn->notifier_head.head) {
4392 srcu_cleanup_notifier_head(&cn->notifier_head);
4393 list_del(&cn->node);
4415 * struct of_clk_provider - Clock provider registration structure
4456 unsigned int idx = clkspec->args[0];
4458 if (idx >= clk_data->clk_num) {
4460 return ERR_PTR(-EINVAL);
4463 return clk_data->clks[idx];
4471 unsigned int idx = clkspec->args[0];
4473 if (idx >= hw_data->num) {
4475 return ERR_PTR(-EINVAL);
4478 return hw_data->hws[idx];
4483 * of_clk_add_provider() - Register a clock provider for a node
4500 return -ENOMEM;
4502 cp->node = of_node_get(np);
4503 cp->data = data;
4504 cp->get = clk_src_get;
4507 list_add(&cp->link, &of_clk_providers);
4522 * of_clk_add_hw_provider() - Register a clock provider for a node
4537 return -ENOMEM;
4539 cp->node = of_node_get(np);
4540 cp->data = data;
4541 cp->get_hw = get;
4544 list_add(&cp->link, &of_clk_providers);
4565 * for cases like MFD sub-devices where the child device driver wants to use
4566 * devm_*() APIs but not list the device in DT as a sub-node.
4572 np = dev->of_node;
4573 parent_np = dev->parent ? dev->parent->of_node : NULL;
4575 if (!of_find_property(np, "#clock-cells", NULL))
4576 if (of_find_property(parent_np, "#clock-cells", NULL))
4583 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4589 * node or if the device node lacks of clock provider information (#clock-cells)
4591 * has the #clock-cells then it is used in registration. Provider is
4607 return -ENOMEM;
4623 * of_clk_del_provider() - Remove a previously registered clock provider
4632 if (cp->node == np) {
4633 list_del(&cp->link);
4634 of_node_put(cp->node);
4654 * devm_of_clk_del_provider() - Remove clock provider registered using devm
4670 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
4676 * Parses a device node's "clocks" and "clock-names" properties to find the
4679 * parsing error. The @index argument is ignored if @name is non-NULL.
4683 * phandle1: clock-controller@1 {
4684 * #clock-cells = <2>;
4687 * phandle2: clock-controller@2 {
4688 * #clock-cells = <1>;
4691 * clock-consumer@3 {
4692 * clocks = <&phandle1 1 2 &phandle2 3>;
4693 * clock-names = "name1", "name2";
4696 * To get a device_node for `clock-controller@2' node you may call this
4699 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
4700 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
4701 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
4703 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
4704 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
4705 * the "clock-names" property of @np.
4710 int ret = -ENOENT;
4715 * For named clocks, first look up the name in the
4716 * "clock-names" property. If it cannot be found, then index
4718 * return -EINVAL.
4721 index = of_property_match_string(np, "clock-names", name);
4722 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
4731 * has a "clock-ranges" property, then we can try one of its
4732 * clocks.
4734 np = np->parent;
4735 if (np && !of_get_property(np, "clock-ranges", NULL))
4749 if (provider->get_hw)
4750 return provider->get_hw(clkspec, provider->data);
4752 clk = provider->get(clkspec, provider->data);
4762 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
4765 return ERR_PTR(-EINVAL);
4769 if (provider->node == clkspec->np) {
4781 * of_clk_get_from_provider() - Lookup a clock from a clock provider
4824 return __of_clk_get(np, index, np->full_name, NULL);
4829 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
4833 * This function parses the clocks and clock-names properties,
4840 return ERR_PTR(-ENOENT);
4842 return __of_clk_get(np, 0, np->full_name, name);
4847 * of_clk_get_parent_count() - Count the number of clocks a device node has
4850 * Returns: The number of clocks that are possible parents of this node
4856 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
4875 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
4884 * specified into an array offset for the clock-output-names property.
4886 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
4893 /* We went off the end of 'clock-indices' without finding it */
4897 if (of_property_read_string_index(clkspec.np, "clock-output-names",
4904 * the clock as long as #clock-cells = 0.
4909 clk_name = clkspec.np->name;
4925 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
4971 if (PTR_ERR(clk) == -EPROBE_DEFER)
4987 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
4990 * @flags: pointer to top-level framework flags
4992 * Detects if the clock-critical property exists and, if so, sets the
4996 * bindings, such as the one-clock-per-node style that are outdated.
5012 return -EINVAL;
5014 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
5022 * of_clk_init() - Scan and init clock providers from the DT
5041 /* First prepare the list of the clocks providers */
5052 list_del(&clk_provider->node);
5053 of_node_put(clk_provider->np);
5060 parent->clk_init_cb = match->data;
5061 parent->np = of_node_get(np);
5062 list_add_tail(&parent->node, &clk_provider_list);
5069 if (force || parent_ready(clk_provider->np)) {
5072 of_node_set_flag(clk_provider->np,
5075 clk_provider->clk_init_cb(clk_provider->np);
5076 of_clk_set_defaults(clk_provider->np, true);
5078 list_del(&clk_provider->node);
5079 of_node_put(clk_provider->np);