Lines Matching refs:shift
81 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \ argument
82 to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask))
90 #define imx_clk_divider(name, parent, reg, shift, width) \ argument
91 to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))
93 #define imx_clk_divider2(name, parent, reg, shift, width) \ argument
94 to_clk(imx_clk_hw_divider2(name, parent, reg, shift, width))
96 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \ argument
97 to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))
99 #define imx_clk_gate(name, parent, reg, shift) \ argument
100 to_clk(imx_clk_hw_gate(name, parent, reg, shift))
102 #define imx_clk_gate_dis(name, parent, reg, shift) \ argument
103 to_clk(imx_clk_hw_gate_dis(name, parent, reg, shift))
105 #define imx_clk_gate2(name, parent, reg, shift) \ argument
106 to_clk(imx_clk_hw_gate2(name, parent, reg, shift))
108 #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \ argument
109 to_clk(imx_clk_hw_gate2_flags(name, parent, reg, shift, flags))
111 #define imx_clk_gate2_shared2(name, parent, reg, shift, share_count) \ argument
112 to_clk(imx_clk_hw_gate2_shared2(name, parent, reg, shift, share_count))
114 #define imx_clk_gate3(name, parent, reg, shift) \ argument
115 to_clk(imx_clk_hw_gate3(name, parent, reg, shift))
117 #define imx_clk_gate4(name, parent, reg, shift) \ argument
118 to_clk(imx_clk_hw_gate4(name, parent, reg, shift))
120 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument
121 to_clk(imx_clk_hw_mux(name, reg, shift, width, parents, num_parents))
215 void __iomem *reg, u8 shift, u32 exclusive_mask);
224 void __iomem *reg, u8 shift, u8 width,
227 struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift,
238 void __iomem *reg, u8 shift, u8 width,
242 u8 shift, u8 width, const char * const *parents,
265 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_mux_ldb() argument
270 shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock); in imx_clk_hw_mux_ldb()
282 void __iomem *reg, u8 shift, in imx_clk_hw_divider() argument
286 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_divider()
291 void __iomem *reg, u8 shift, in imx_clk_hw_divider_flags() argument
295 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_divider_flags()
299 void __iomem *reg, u8 shift, u8 width) in imx_clk_hw_divider2() argument
303 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_divider2()
307 const char *parent, void __iomem *reg, u8 shift, u8 width, in imx_clk_divider2_flags() argument
312 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_divider2_flags()
316 void __iomem *reg, u8 shift, unsigned long flags) in imx_clk_hw_gate_flags() argument
319 shift, 0, &imx_ccm_lock); in imx_clk_hw_gate_flags()
323 void __iomem *reg, u8 shift) in imx_clk_hw_gate() argument
326 shift, 0, &imx_ccm_lock); in imx_clk_hw_gate()
330 const char *parent, void __iomem *reg, u8 shift) in imx_dev_clk_hw_gate() argument
333 shift, 0, &imx_ccm_lock); in imx_dev_clk_hw_gate()
337 void __iomem *reg, u8 shift) in imx_clk_hw_gate_dis() argument
340 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); in imx_clk_hw_gate_dis()
344 void __iomem *reg, u8 shift, unsigned long flags) in imx_clk_hw_gate_dis_flags() argument
347 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); in imx_clk_hw_gate_dis_flags()
351 void __iomem *reg, u8 shift) in imx_clk_hw_gate2() argument
354 shift, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_hw_gate2()
358 void __iomem *reg, u8 shift, unsigned long flags) in imx_clk_hw_gate2_flags() argument
361 shift, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_hw_gate2_flags()
365 const char *parent, void __iomem *reg, u8 shift, in imx_clk_hw_gate2_shared() argument
369 shift, 0x3, 0, &imx_ccm_lock, share_count); in imx_clk_hw_gate2_shared()
373 const char *parent, void __iomem *reg, u8 shift, in imx_clk_hw_gate2_shared2() argument
377 CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0, in imx_clk_hw_gate2_shared2()
383 void __iomem *reg, u8 shift, in imx_dev_clk_hw_gate_shared() argument
387 CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, in imx_dev_clk_hw_gate_shared()
393 const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) in imx_clk_gate2_cgr() argument
396 shift, cgr_val, 0, &imx_ccm_lock, NULL); in imx_clk_gate2_cgr()
400 void __iomem *reg, u8 shift) in imx_clk_hw_gate3() argument
404 reg, shift, 0, &imx_ccm_lock); in imx_clk_hw_gate3()
408 const char *parent, void __iomem *reg, u8 shift, in imx_clk_hw_gate3_flags() argument
413 reg, shift, 0, &imx_ccm_lock); in imx_clk_hw_gate3_flags()
416 #define imx_clk_gate3_flags(name, parent, reg, shift, flags) \ argument
417 to_clk(imx_clk_hw_gate3_flags(name, parent, reg, shift, flags))
420 void __iomem *reg, u8 shift) in imx_clk_hw_gate4() argument
424 reg, shift, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_hw_gate4()
428 const char *parent, void __iomem *reg, u8 shift, in imx_clk_hw_gate4_flags() argument
433 reg, shift, 0x3, 0, &imx_ccm_lock, NULL); in imx_clk_hw_gate4_flags()
436 #define imx_clk_gate4_flags(name, parent, reg, shift, flags) \ argument
437 to_clk(imx_clk_hw_gate4_flags(name, parent, reg, shift, flags))
440 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_mux() argument
444 CLK_SET_RATE_NO_REPARENT, reg, shift, in imx_clk_hw_mux()
449 const char *name, void __iomem *reg, u8 shift, in imx_dev_clk_hw_mux() argument
454 reg, shift, width, 0, &imx_ccm_lock); in imx_dev_clk_hw_mux()
458 u8 shift, u8 width, const char * const *parents, in imx_clk_mux2() argument
463 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_mux2()
467 u8 shift, u8 width, in imx_clk_hw_mux2() argument
474 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_mux2()
478 void __iomem *reg, u8 shift, u8 width, in imx_clk_mux_flags() argument
483 flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0, in imx_clk_mux_flags()
488 void __iomem *reg, u8 shift, u8 width, in imx_clk_hw_mux2_flags() argument
494 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_mux2_flags()
498 void __iomem *reg, u8 shift, u8 width, in imx_clk_mux2_flags() argument
504 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_mux2_flags()
508 void __iomem *reg, u8 shift, in imx_clk_hw_mux_flags() argument
516 reg, shift, width, 0, &imx_ccm_lock); in imx_clk_hw_mux_flags()
521 void __iomem *reg, u8 shift, in imx_dev_clk_hw_mux_flags() argument
529 reg, shift, width, 0, &imx_ccm_lock); in imx_dev_clk_hw_mux_flags()
601 unsigned long flags, void __iomem *reg, u8 shift, u8 width,