Lines Matching refs:dmadev
309 static u32 stm32_mdma_read(struct stm32_mdma_device *dmadev, u32 reg) in stm32_mdma_read() argument
311 return readl_relaxed(dmadev->base + reg); in stm32_mdma_read()
314 static void stm32_mdma_write(struct stm32_mdma_device *dmadev, u32 reg, u32 val) in stm32_mdma_write() argument
316 writel_relaxed(val, dmadev->base + reg); in stm32_mdma_write()
319 static void stm32_mdma_set_bits(struct stm32_mdma_device *dmadev, u32 reg, in stm32_mdma_set_bits() argument
322 void __iomem *addr = dmadev->base + reg; in stm32_mdma_set_bits()
327 static void stm32_mdma_clr_bits(struct stm32_mdma_device *dmadev, u32 reg, in stm32_mdma_clr_bits() argument
330 void __iomem *addr = dmadev->base + reg; in stm32_mdma_clr_bits()
427 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_disable_chan() local
435 stm32_mdma_clr_bits(dmadev, reg, STM32_MDMA_CCR_IRQ_MASK); in stm32_mdma_disable_chan()
437 ccr = stm32_mdma_read(dmadev, reg); in stm32_mdma_disable_chan()
439 stm32_mdma_clr_bits(dmadev, reg, STM32_MDMA_CCR_EN); in stm32_mdma_disable_chan()
443 dmadev->base + STM32_MDMA_CISR(id), cisr, in stm32_mdma_disable_chan()
456 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_stop() local
466 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_stop()
470 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status); in stm32_mdma_stop()
476 static void stm32_mdma_set_bus(struct stm32_mdma_device *dmadev, u32 *ctbr, in stm32_mdma_set_bus() argument
485 for (i = 0; i < dmadev->nr_ahb_addr_masks; i++) { in stm32_mdma_set_bus()
486 if (mask == dmadev->ahb_addr_masks[i]) { in stm32_mdma_set_bus()
499 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_set_xfer_param() local
512 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)); in stm32_mdma_set_xfer_param()
513 ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id)); in stm32_mdma_set_xfer_param()
514 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id)); in stm32_mdma_set_xfer_param()
603 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_set_xfer_param()
610 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(chan->id), dst_addr); in stm32_mdma_set_xfer_param()
650 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_set_xfer_param()
657 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(chan->id), src_addr); in stm32_mdma_set_xfer_param()
729 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_setup_xfer() local
748 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_setup_xfer()
756 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_setup_xfer()
825 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_prep_dma_cyclic() local
864 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_prep_dma_cyclic()
870 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_prep_dma_cyclic()
914 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_prep_dma_memcpy() local
940 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)); in stm32_mdma_prep_dma_memcpy()
941 ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id)); in stm32_mdma_prep_dma_memcpy()
942 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id)); in stm32_mdma_prep_dma_memcpy()
943 cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id)); in stm32_mdma_prep_dma_memcpy()
966 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, src); in stm32_mdma_prep_dma_memcpy()
967 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, dest); in stm32_mdma_prep_dma_memcpy()
1090 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_dump_reg() local
1093 stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id))); in stm32_mdma_dump_reg()
1095 stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id))); in stm32_mdma_dump_reg()
1097 stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id))); in stm32_mdma_dump_reg()
1099 stm32_mdma_read(dmadev, STM32_MDMA_CSAR(chan->id))); in stm32_mdma_dump_reg()
1101 stm32_mdma_read(dmadev, STM32_MDMA_CDAR(chan->id))); in stm32_mdma_dump_reg()
1103 stm32_mdma_read(dmadev, STM32_MDMA_CBRUR(chan->id))); in stm32_mdma_dump_reg()
1105 stm32_mdma_read(dmadev, STM32_MDMA_CLAR(chan->id))); in stm32_mdma_dump_reg()
1107 stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id))); in stm32_mdma_dump_reg()
1109 stm32_mdma_read(dmadev, STM32_MDMA_CMAR(chan->id))); in stm32_mdma_dump_reg()
1111 stm32_mdma_read(dmadev, STM32_MDMA_CMDR(chan->id))); in stm32_mdma_dump_reg()
1116 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_start_transfer() local
1134 stm32_mdma_write(dmadev, STM32_MDMA_CCR(id), chan->desc->ccr); in stm32_mdma_start_transfer()
1135 stm32_mdma_write(dmadev, STM32_MDMA_CTCR(id), hwdesc->ctcr); in stm32_mdma_start_transfer()
1136 stm32_mdma_write(dmadev, STM32_MDMA_CBNDTR(id), hwdesc->cbndtr); in stm32_mdma_start_transfer()
1137 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(id), hwdesc->csar); in stm32_mdma_start_transfer()
1138 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(id), hwdesc->cdar); in stm32_mdma_start_transfer()
1139 stm32_mdma_write(dmadev, STM32_MDMA_CBRUR(id), hwdesc->cbrur); in stm32_mdma_start_transfer()
1140 stm32_mdma_write(dmadev, STM32_MDMA_CLAR(id), hwdesc->clar); in stm32_mdma_start_transfer()
1141 stm32_mdma_write(dmadev, STM32_MDMA_CTBR(id), hwdesc->ctbr); in stm32_mdma_start_transfer()
1142 stm32_mdma_write(dmadev, STM32_MDMA_CMAR(id), hwdesc->cmar); in stm32_mdma_start_transfer()
1143 stm32_mdma_write(dmadev, STM32_MDMA_CMDR(id), hwdesc->cmdr); in stm32_mdma_start_transfer()
1146 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(id)); in stm32_mdma_start_transfer()
1148 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(id), status); in stm32_mdma_start_transfer()
1153 stm32_mdma_set_bits(dmadev, STM32_MDMA_CCR(id), STM32_MDMA_CCR_EN); in stm32_mdma_start_transfer()
1158 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_SWRQ); in stm32_mdma_start_transfer()
1204 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_resume() local
1214 stm32_mdma_write(dmadev, STM32_MDMA_CCR(chan->id), chan->desc->ccr); in stm32_mdma_resume()
1217 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_resume()
1219 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status); in stm32_mdma_resume()
1225 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_EN); in stm32_mdma_resume()
1229 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_SWRQ); in stm32_mdma_resume()
1280 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_desc_residue() local
1290 cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id)); in stm32_mdma_desc_residue()
1346 struct stm32_mdma_device *dmadev = devid; in stm32_mdma_irq_handler() local
1351 status = readl_relaxed(dmadev->base + STM32_MDMA_GISR0); in stm32_mdma_irq_handler()
1353 dev_dbg(mdma2dev(dmadev), "spurious it\n"); in stm32_mdma_irq_handler()
1358 chan = &dmadev->chan[id]; in stm32_mdma_irq_handler()
1360 dev_warn(mdma2dev(dmadev), "MDMA channel not initialized\n"); in stm32_mdma_irq_handler()
1366 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(id)); in stm32_mdma_irq_handler()
1369 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(id)); in stm32_mdma_irq_handler()
1384 readl_relaxed(dmadev->base + STM32_MDMA_CESR(id))); in stm32_mdma_irq_handler()
1385 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CTEIF); in stm32_mdma_irq_handler()
1390 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CCTCIF); in stm32_mdma_irq_handler()
1396 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CBRTIF); in stm32_mdma_irq_handler()
1401 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CBTIF); in stm32_mdma_irq_handler()
1412 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CLTCIF); in stm32_mdma_irq_handler()
1417 stm32_mdma_set_bits(dmadev, reg, status); in stm32_mdma_irq_handler()
1431 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_alloc_chan_resources() local
1444 ret = pm_runtime_resume_and_get(dmadev->ddev.dev); in stm32_mdma_alloc_chan_resources()
1450 pm_runtime_put(dmadev->ddev.dev); in stm32_mdma_alloc_chan_resources()
1458 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_free_chan_resources() local
1470 pm_runtime_put(dmadev->ddev.dev); in stm32_mdma_free_chan_resources()
1479 struct stm32_mdma_device *dmadev = ofdma->of_dma_data; in stm32_mdma_of_xlate() local
1485 dev_err(mdma2dev(dmadev), "Bad number of args\n"); in stm32_mdma_of_xlate()
1495 if (config.request >= dmadev->nr_requests) { in stm32_mdma_of_xlate()
1496 dev_err(mdma2dev(dmadev), "Bad request line\n"); in stm32_mdma_of_xlate()
1501 dev_err(mdma2dev(dmadev), "Priority level not supported\n"); in stm32_mdma_of_xlate()
1505 c = dma_get_any_slave_channel(&dmadev->ddev); in stm32_mdma_of_xlate()
1507 dev_err(mdma2dev(dmadev), "No more channels available\n"); in stm32_mdma_of_xlate()
1526 struct stm32_mdma_device *dmadev; in stm32_mdma_probe() local
1558 dmadev = devm_kzalloc(&pdev->dev, sizeof(*dmadev) + sizeof(u32) * count, in stm32_mdma_probe()
1560 if (!dmadev) in stm32_mdma_probe()
1563 dmadev->nr_channels = nr_channels; in stm32_mdma_probe()
1564 dmadev->nr_requests = nr_requests; in stm32_mdma_probe()
1566 dmadev->ahb_addr_masks, in stm32_mdma_probe()
1568 dmadev->nr_ahb_addr_masks = count; in stm32_mdma_probe()
1571 dmadev->base = devm_ioremap_resource(&pdev->dev, res); in stm32_mdma_probe()
1572 if (IS_ERR(dmadev->base)) in stm32_mdma_probe()
1573 return PTR_ERR(dmadev->base); in stm32_mdma_probe()
1575 dmadev->clk = devm_clk_get(&pdev->dev, NULL); in stm32_mdma_probe()
1576 if (IS_ERR(dmadev->clk)) in stm32_mdma_probe()
1577 return dev_err_probe(&pdev->dev, PTR_ERR(dmadev->clk), in stm32_mdma_probe()
1580 ret = clk_prepare_enable(dmadev->clk); in stm32_mdma_probe()
1597 dd = &dmadev->ddev; in stm32_mdma_probe()
1631 for (i = 0; i < dmadev->nr_channels; i++) { in stm32_mdma_probe()
1632 chan = &dmadev->chan[i]; in stm32_mdma_probe()
1638 dmadev->irq = platform_get_irq(pdev, 0); in stm32_mdma_probe()
1639 if (dmadev->irq < 0) { in stm32_mdma_probe()
1640 ret = dmadev->irq; in stm32_mdma_probe()
1644 ret = devm_request_irq(&pdev->dev, dmadev->irq, stm32_mdma_irq_handler, in stm32_mdma_probe()
1645 0, dev_name(&pdev->dev), dmadev); in stm32_mdma_probe()
1655 ret = of_dma_controller_register(of_node, stm32_mdma_of_xlate, dmadev); in stm32_mdma_probe()
1662 platform_set_drvdata(pdev, dmadev); in stm32_mdma_probe()
1673 clk_disable_unprepare(dmadev->clk); in stm32_mdma_probe()
1681 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_runtime_suspend() local
1683 clk_disable_unprepare(dmadev->clk); in stm32_mdma_runtime_suspend()
1690 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_runtime_resume() local
1693 ret = clk_prepare_enable(dmadev->clk); in stm32_mdma_runtime_resume()
1706 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_pm_suspend() local
1714 for (id = 0; id < dmadev->nr_channels; id++) { in stm32_mdma_pm_suspend()
1715 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(id)); in stm32_mdma_pm_suspend()