71 	outb(index, hwif->dma_base + 1);  in get_indexed_reg()
72 	value = inb(hwif->dma_base + 3);  in get_indexed_reg()
85 	outb(index, hwif->dma_base + 1);  in set_indexed_reg()
86 	outb(value, hwif->dma_base + 3);  in set_indexed_reg()
200 static long read_counter(u32 dma_base)  in read_counter()  argument
202 	u32  pri_dma_base = dma_base, sec_dma_base = dma_base + 0x08;  in read_counter()
240 static long detect_pll_input_clock(unsigned long dma_base)  in detect_pll_input_clock()  argument
247 	start_count = read_counter(dma_base);  in detect_pll_input_clock()
251 	outb(0x01, dma_base + 0x01);  in detect_pll_input_clock()
252 	scr1 = inb(dma_base + 0x03);  in detect_pll_input_clock()
254 	outb(scr1 | 0x40, dma_base + 0x03);  in detect_pll_input_clock()
259 	end_count = read_counter(dma_base);  in detect_pll_input_clock()
263 	outb(0x01, dma_base + 0x01);  in detect_pll_input_clock()
264 	scr1 = inb(dma_base + 0x03);  in detect_pll_input_clock()
266 	outb(scr1 & ~0x40, dma_base + 0x03);  in detect_pll_input_clock()
301 	unsigned long dma_base = pci_resource_start(dev, 4);  in init_chipset_pdcnew()  local
302 	unsigned long sec_dma_base = dma_base + 0x08;  in init_chipset_pdcnew()
307 	if (dma_base == 0)  in init_chipset_pdcnew()
332 	pll_input = detect_pll_input_clock(dma_base);  in init_chipset_pdcnew()