Lines Matching refs:pctrl
567 static u32 chv_pctrl_readl(struct intel_pinctrl *pctrl, unsigned int offset) in chv_pctrl_readl() argument
569 const struct intel_community *community = &pctrl->communities[0]; in chv_pctrl_readl()
574 static void chv_pctrl_writel(struct intel_pinctrl *pctrl, unsigned int offset, u32 value) in chv_pctrl_writel() argument
576 const struct intel_community *community = &pctrl->communities[0]; in chv_pctrl_writel()
584 static void __iomem *chv_padreg(struct intel_pinctrl *pctrl, unsigned int offset, in chv_padreg() argument
587 const struct intel_community *community = &pctrl->communities[0]; in chv_padreg()
596 static u32 chv_readl(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset) in chv_readl() argument
598 return readl(chv_padreg(pctrl, pin, offset)); in chv_readl()
601 static void chv_writel(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset, u32 valu… in chv_writel() argument
603 void __iomem *reg = chv_padreg(pctrl, pin, offset); in chv_writel()
611 static bool chv_pad_locked(struct intel_pinctrl *pctrl, unsigned int offset) in chv_pad_locked() argument
613 return chv_readl(pctrl, offset, CHV_PADCTRL1) & CHV_PADCTRL1_CFGLOCK; in chv_pad_locked()
618 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_groups_count() local
620 return pctrl->soc->ngroups; in chv_get_groups_count()
626 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_group_name() local
628 return pctrl->soc->groups[group].name; in chv_get_group_name()
634 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_group_pins() local
636 *pins = pctrl->soc->groups[group].pins; in chv_get_group_pins()
637 *npins = pctrl->soc->groups[group].npins; in chv_get_group_pins()
644 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_pin_dbg_show() local
651 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_pin_dbg_show()
652 ctrl1 = chv_readl(pctrl, offset, CHV_PADCTRL1); in chv_pin_dbg_show()
653 locked = chv_pad_locked(pctrl, offset); in chv_pin_dbg_show()
683 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_functions_count() local
685 return pctrl->soc->nfunctions; in chv_get_functions_count()
691 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_function_name() local
693 return pctrl->soc->functions[function].name; in chv_get_function_name()
701 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_get_function_groups() local
703 *groups = pctrl->soc->functions[function].groups; in chv_get_function_groups()
704 *ngroups = pctrl->soc->functions[function].ngroups; in chv_get_function_groups()
711 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_pinmux_set_mux() local
716 grp = &pctrl->soc->groups[group]; in chv_pinmux_set_mux()
722 if (chv_pad_locked(pctrl, grp->pins[i])) { in chv_pinmux_set_mux()
723 dev_warn(pctrl->dev, "unable to set mode for locked pin %u\n", in chv_pinmux_set_mux()
746 value = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_pinmux_set_mux()
752 chv_writel(pctrl, pin, CHV_PADCTRL0, value); in chv_pinmux_set_mux()
755 value = chv_readl(pctrl, pin, CHV_PADCTRL1) & ~CHV_PADCTRL1_INVRXTX_MASK; in chv_pinmux_set_mux()
758 chv_writel(pctrl, pin, CHV_PADCTRL1, value); in chv_pinmux_set_mux()
760 dev_dbg(pctrl->dev, "configured pin %u mode %u OE %sinverted\n", in chv_pinmux_set_mux()
769 static void chv_gpio_clear_triggering(struct intel_pinctrl *pctrl, in chv_gpio_clear_triggering() argument
781 value = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_clear_triggering()
785 value = chv_readl(pctrl, offset, CHV_PADCTRL1); in chv_gpio_clear_triggering()
788 chv_writel(pctrl, offset, CHV_PADCTRL1, value); in chv_gpio_clear_triggering()
795 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_request_enable() local
801 if (chv_pad_locked(pctrl, offset)) { in chv_gpio_request_enable()
802 value = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_request_enable()
809 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_request_enable()
821 chv_gpio_clear_triggering(pctrl, offset); in chv_gpio_request_enable()
823 value = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_request_enable()
837 chv_writel(pctrl, offset, CHV_PADCTRL0, value); in chv_gpio_request_enable()
849 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_disable_free() local
854 if (!chv_pad_locked(pctrl, offset)) in chv_gpio_disable_free()
855 chv_gpio_clear_triggering(pctrl, offset); in chv_gpio_disable_free()
864 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_gpio_set_direction() local
870 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0) & ~CHV_PADCTRL0_GPIOCFG_MASK; in chv_gpio_set_direction()
875 chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0); in chv_gpio_set_direction()
895 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_config_get() local
903 ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_config_get()
904 ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_config_get()
972 static int chv_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, in chv_config_set_pull() argument
979 ctrl0 = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_config_set_pull()
1031 chv_writel(pctrl, pin, CHV_PADCTRL0, ctrl0); in chv_config_set_pull()
1037 static int chv_config_set_oden(struct intel_pinctrl *pctrl, unsigned int pin, in chv_config_set_oden() argument
1044 ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_config_set_oden()
1051 chv_writel(pctrl, pin, CHV_PADCTRL1, ctrl1); in chv_config_set_oden()
1060 struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); in chv_config_set() local
1065 if (chv_pad_locked(pctrl, pin)) in chv_config_set()
1076 ret = chv_config_set_pull(pctrl, pin, param, arg); in chv_config_set()
1082 ret = chv_config_set_oden(pctrl, pin, false); in chv_config_set()
1088 ret = chv_config_set_oden(pctrl, pin, true); in chv_config_set()
1097 dev_dbg(pctrl->dev, "pin %d set config %d arg %u\n", pin, in chv_config_set()
1161 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_get() local
1166 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_get()
1179 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_set() local
1185 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_set()
1192 chv_writel(pctrl, offset, CHV_PADCTRL0, ctrl0); in chv_gpio_set()
1199 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_get_direction() local
1204 ctrl0 = chv_readl(pctrl, offset, CHV_PADCTRL0); in chv_gpio_get_direction()
1242 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_ack() local
1248 intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_gpio_irq_ack()
1251 chv_pctrl_writel(pctrl, CHV_INTSTAT, BIT(intr_line)); in chv_gpio_irq_ack()
1259 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_mask_unmask() local
1266 intr_line = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_gpio_irq_mask_unmask()
1270 value = chv_pctrl_readl(pctrl, CHV_INTMASK); in chv_gpio_irq_mask_unmask()
1275 chv_pctrl_writel(pctrl, CHV_INTMASK, value); in chv_gpio_irq_mask_unmask()
1304 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_startup() local
1305 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_irq_startup()
1312 intsel = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_gpio_irq_startup()
1316 value = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_gpio_irq_startup()
1336 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_type() local
1337 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_irq_type()
1357 if (!chv_pad_locked(pctrl, pin)) { in chv_gpio_irq_type()
1358 value = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_gpio_irq_type()
1375 chv_writel(pctrl, pin, CHV_PADCTRL1, value); in chv_gpio_irq_type()
1378 value = chv_readl(pctrl, pin, CHV_PADCTRL0); in chv_gpio_irq_type()
1397 struct intel_pinctrl *pctrl = gpiochip_get_data(gc); in chv_gpio_irq_handler() local
1398 const struct intel_community *community = &pctrl->communities[0]; in chv_gpio_irq_handler()
1399 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_irq_handler()
1408 pending = chv_pctrl_readl(pctrl, CHV_INTSTAT); in chv_gpio_irq_handler()
1467 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_init_irq_valid_mask() local
1468 const struct intel_community *community = &pctrl->communities[0]; in chv_init_irq_valid_mask()
1472 for (i = 0; i < pctrl->soc->npins; i++) { in chv_init_irq_valid_mask()
1476 desc = &pctrl->soc->pins[i]; in chv_init_irq_valid_mask()
1478 intsel = chv_readl(pctrl, desc->number, CHV_PADCTRL0); in chv_init_irq_valid_mask()
1489 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_irq_init_hw() local
1490 const struct intel_community *community = &pctrl->communities[0]; in chv_gpio_irq_init_hw()
1499 if (!pctrl->chip.irq.init_valid_mask) { in chv_gpio_irq_init_hw()
1504 chv_pctrl_writel(pctrl, CHV_INTMASK, GENMASK(31, community->nirqs)); in chv_gpio_irq_init_hw()
1508 chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff); in chv_gpio_irq_init_hw()
1515 struct intel_pinctrl *pctrl = gpiochip_get_data(chip); in chv_gpio_add_pin_ranges() local
1516 const struct intel_community *community = &pctrl->communities[0]; in chv_gpio_add_pin_ranges()
1522 ret = gpiochip_add_pin_range(chip, dev_name(pctrl->dev), in chv_gpio_add_pin_ranges()
1526 dev_err(pctrl->dev, "failed to add GPIO pin range\n"); in chv_gpio_add_pin_ranges()
1534 static int chv_gpio_probe(struct intel_pinctrl *pctrl, int irq) in chv_gpio_probe() argument
1536 const struct intel_community *community = &pctrl->communities[0]; in chv_gpio_probe()
1538 struct gpio_chip *chip = &pctrl->chip; in chv_gpio_probe()
1544 chip->ngpio = pctrl->soc->pins[pctrl->soc->npins - 1].number + 1; in chv_gpio_probe()
1545 chip->label = dev_name(pctrl->dev); in chv_gpio_probe()
1547 chip->parent = pctrl->dev; in chv_gpio_probe()
1550 pctrl->irq = irq; in chv_gpio_probe()
1551 pctrl->irqchip.name = "chv-gpio"; in chv_gpio_probe()
1552 pctrl->irqchip.irq_startup = chv_gpio_irq_startup; in chv_gpio_probe()
1553 pctrl->irqchip.irq_ack = chv_gpio_irq_ack; in chv_gpio_probe()
1554 pctrl->irqchip.irq_mask = chv_gpio_irq_mask; in chv_gpio_probe()
1555 pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask; in chv_gpio_probe()
1556 pctrl->irqchip.irq_set_type = chv_gpio_irq_type; in chv_gpio_probe()
1557 pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE; in chv_gpio_probe()
1559 chip->irq.chip = &pctrl->irqchip; in chv_gpio_probe()
1563 chip->irq.parents = &pctrl->irq; in chv_gpio_probe()
1569 irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0, in chv_gpio_probe()
1570 pctrl->soc->npins, NUMA_NO_NODE); in chv_gpio_probe()
1572 dev_err(pctrl->dev, "Failed to allocate IRQ numbers\n"); in chv_gpio_probe()
1577 ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl); in chv_gpio_probe()
1579 dev_err(pctrl->dev, "Failed to register gpiochip\n"); in chv_gpio_probe()
1600 struct intel_pinctrl *pctrl = region_context; in chv_pinctrl_mmio_access_handler() local
1607 chv_pctrl_writel(pctrl, address, *value); in chv_pinctrl_mmio_access_handler()
1609 *value = chv_pctrl_readl(pctrl, address); in chv_pinctrl_mmio_access_handler()
1624 struct intel_pinctrl *pctrl; in chv_pinctrl_probe() local
1632 pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL); in chv_pinctrl_probe()
1633 if (!pctrl) in chv_pinctrl_probe()
1636 pctrl->dev = dev; in chv_pinctrl_probe()
1637 pctrl->soc = soc_data; in chv_pinctrl_probe()
1639 pctrl->ncommunities = pctrl->soc->ncommunities; in chv_pinctrl_probe()
1640 pctrl->communities = devm_kmemdup(dev, pctrl->soc->communities, in chv_pinctrl_probe()
1641 pctrl->ncommunities * sizeof(*pctrl->communities), in chv_pinctrl_probe()
1643 if (!pctrl->communities) in chv_pinctrl_probe()
1646 community = &pctrl->communities[0]; in chv_pinctrl_probe()
1654 pctrl->context.pads = devm_kcalloc(dev, pctrl->soc->npins, in chv_pinctrl_probe()
1655 sizeof(*pctrl->context.pads), in chv_pinctrl_probe()
1657 if (!pctrl->context.pads) in chv_pinctrl_probe()
1661 pctrl->context.communities = devm_kcalloc(dev, pctrl->soc->ncommunities, in chv_pinctrl_probe()
1662 sizeof(*pctrl->context.communities), in chv_pinctrl_probe()
1664 if (!pctrl->context.communities) in chv_pinctrl_probe()
1671 pctrl->pctldesc = chv_pinctrl_desc; in chv_pinctrl_probe()
1672 pctrl->pctldesc.name = dev_name(dev); in chv_pinctrl_probe()
1673 pctrl->pctldesc.pins = pctrl->soc->pins; in chv_pinctrl_probe()
1674 pctrl->pctldesc.npins = pctrl->soc->npins; in chv_pinctrl_probe()
1676 pctrl->pctldev = devm_pinctrl_register(dev, &pctrl->pctldesc, pctrl); in chv_pinctrl_probe()
1677 if (IS_ERR(pctrl->pctldev)) { in chv_pinctrl_probe()
1679 return PTR_ERR(pctrl->pctldev); in chv_pinctrl_probe()
1682 ret = chv_gpio_probe(pctrl, irq); in chv_pinctrl_probe()
1689 NULL, pctrl); in chv_pinctrl_probe()
1693 platform_set_drvdata(pdev, pctrl); in chv_pinctrl_probe()
1700 struct intel_pinctrl *pctrl = platform_get_drvdata(pdev); in chv_pinctrl_remove() local
1701 const struct intel_community *community = &pctrl->communities[0]; in chv_pinctrl_remove()
1713 struct intel_pinctrl *pctrl = dev_get_drvdata(dev); in chv_pinctrl_suspend_noirq() local
1714 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_pinctrl_suspend_noirq()
1720 cctx->saved_intmask = chv_pctrl_readl(pctrl, CHV_INTMASK); in chv_pinctrl_suspend_noirq()
1722 for (i = 0; i < pctrl->soc->npins; i++) { in chv_pinctrl_suspend_noirq()
1724 struct intel_pad_context *ctx = &pctrl->context.pads[i]; in chv_pinctrl_suspend_noirq()
1726 desc = &pctrl->soc->pins[i]; in chv_pinctrl_suspend_noirq()
1727 if (chv_pad_locked(pctrl, desc->number)) in chv_pinctrl_suspend_noirq()
1730 ctx->padctrl0 = chv_readl(pctrl, desc->number, CHV_PADCTRL0); in chv_pinctrl_suspend_noirq()
1733 ctx->padctrl1 = chv_readl(pctrl, desc->number, CHV_PADCTRL1); in chv_pinctrl_suspend_noirq()
1743 struct intel_pinctrl *pctrl = dev_get_drvdata(dev); in chv_pinctrl_resume_noirq() local
1744 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_pinctrl_resume_noirq()
1755 chv_pctrl_writel(pctrl, CHV_INTMASK, 0x0000); in chv_pinctrl_resume_noirq()
1757 for (i = 0; i < pctrl->soc->npins; i++) { in chv_pinctrl_resume_noirq()
1759 struct intel_pad_context *ctx = &pctrl->context.pads[i]; in chv_pinctrl_resume_noirq()
1762 desc = &pctrl->soc->pins[i]; in chv_pinctrl_resume_noirq()
1763 if (chv_pad_locked(pctrl, desc->number)) in chv_pinctrl_resume_noirq()
1767 val = chv_readl(pctrl, desc->number, CHV_PADCTRL0); in chv_pinctrl_resume_noirq()
1770 chv_writel(pctrl, desc->number, CHV_PADCTRL0, ctx->padctrl0); in chv_pinctrl_resume_noirq()
1771 dev_dbg(pctrl->dev, "restored pin %2u ctrl0 0x%08x\n", in chv_pinctrl_resume_noirq()
1772 desc->number, chv_readl(pctrl, desc->number, CHV_PADCTRL0)); in chv_pinctrl_resume_noirq()
1775 val = chv_readl(pctrl, desc->number, CHV_PADCTRL1); in chv_pinctrl_resume_noirq()
1777 chv_writel(pctrl, desc->number, CHV_PADCTRL1, ctx->padctrl1); in chv_pinctrl_resume_noirq()
1778 dev_dbg(pctrl->dev, "restored pin %2u ctrl1 0x%08x\n", in chv_pinctrl_resume_noirq()
1779 desc->number, chv_readl(pctrl, desc->number, CHV_PADCTRL1)); in chv_pinctrl_resume_noirq()
1787 chv_pctrl_writel(pctrl, CHV_INTSTAT, 0xffff); in chv_pinctrl_resume_noirq()
1788 chv_pctrl_writel(pctrl, CHV_INTMASK, cctx->saved_intmask); in chv_pinctrl_resume_noirq()