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Lines Matching refs:pctrl

127 	struct pinctrl_dev *pctrl;  member
164 static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl, in pm8xxx_mpp_update() argument
233 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_mpp_update()
235 dev_err(pctrl->dev, "failed to write register\n"); in pm8xxx_mpp_update()
242 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_groups_count() local
244 return pctrl->npins; in pm8xxx_get_groups_count()
259 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_group_pins() local
261 *pins = &pctrl->desc.pins[group].number; in pm8xxx_get_group_pins()
291 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_get_function_groups() local
294 *num_groups = pctrl->npins; in pm8xxx_get_function_groups()
302 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pinmux_set_mux() local
303 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; in pm8xxx_pinmux_set_mux()
306 pm8xxx_mpp_update(pctrl, pin); in pm8xxx_pinmux_set_mux()
322 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pin_config_get() local
323 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_get()
372 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev); in pm8xxx_pin_config_set() local
373 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_set()
415 dev_err(pctrl->dev, in pm8xxx_pin_config_set()
422 pm8xxx_mpp_update(pctrl, pin); in pm8xxx_pin_config_set()
444 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); in pm8xxx_mpp_direction_input() local
445 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_direction_input()
459 pm8xxx_mpp_update(pctrl, pin); in pm8xxx_mpp_direction_input()
468 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); in pm8xxx_mpp_direction_output() local
469 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_direction_output()
485 pm8xxx_mpp_update(pctrl, pin); in pm8xxx_mpp_direction_output()
492 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); in pm8xxx_mpp_get() local
493 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_get()
509 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); in pm8xxx_mpp_set() local
510 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_set()
514 pm8xxx_mpp_update(pctrl, pin); in pm8xxx_mpp_set()
533 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); in pm8xxx_mpp_to_irq() local
534 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_to_irq()
548 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); in pm8xxx_mpp_dbg_show_one() local
549 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_mpp_dbg_show_one()
648 static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl, in pm8xxx_pin_populate() argument
657 ret = regmap_read(pctrl->regmap, pin->reg, &val); in pm8xxx_pin_populate()
659 dev_err(pctrl->dev, "failed to read register\n"); in pm8xxx_pin_populate()
751 struct pm8xxx_mpp *pctrl; in pm8xxx_mpp_probe() local
755 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); in pm8xxx_mpp_probe()
756 if (!pctrl) in pm8xxx_mpp_probe()
759 pctrl->dev = &pdev->dev; in pm8xxx_mpp_probe()
765 pctrl->npins = npins; in pm8xxx_mpp_probe()
767 pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL); in pm8xxx_mpp_probe()
768 if (!pctrl->regmap) { in pm8xxx_mpp_probe()
773 pctrl->desc = pm8xxx_pinctrl_desc; in pm8xxx_mpp_probe()
774 pctrl->desc.npins = pctrl->npins; in pm8xxx_mpp_probe()
777 pctrl->desc.npins, in pm8xxx_mpp_probe()
784 pctrl->desc.npins, in pm8xxx_mpp_probe()
790 for (i = 0; i < pctrl->desc.npins; i++) { in pm8xxx_mpp_probe()
796 ret = pm8xxx_pin_populate(pctrl, &pin_data[i]); in pm8xxx_mpp_probe()
804 pctrl->desc.pins = pins; in pm8xxx_mpp_probe()
806 pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings); in pm8xxx_mpp_probe()
807 pctrl->desc.custom_params = pm8xxx_mpp_bindings; in pm8xxx_mpp_probe()
809 pctrl->desc.custom_conf_items = pm8xxx_conf_items; in pm8xxx_mpp_probe()
812 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl); in pm8xxx_mpp_probe()
813 if (IS_ERR(pctrl->pctrl)) { in pm8xxx_mpp_probe()
815 return PTR_ERR(pctrl->pctrl); in pm8xxx_mpp_probe()
818 pctrl->chip = pm8xxx_mpp_template; in pm8xxx_mpp_probe()
819 pctrl->chip.base = -1; in pm8xxx_mpp_probe()
820 pctrl->chip.parent = &pdev->dev; in pm8xxx_mpp_probe()
821 pctrl->chip.of_node = pdev->dev.of_node; in pm8xxx_mpp_probe()
822 pctrl->chip.of_gpio_n_cells = 2; in pm8xxx_mpp_probe()
823 pctrl->chip.label = dev_name(pctrl->dev); in pm8xxx_mpp_probe()
824 pctrl->chip.ngpio = pctrl->npins; in pm8xxx_mpp_probe()
825 ret = gpiochip_add_data(&pctrl->chip, pctrl); in pm8xxx_mpp_probe()
831 ret = gpiochip_add_pin_range(&pctrl->chip, in pm8xxx_mpp_probe()
832 dev_name(pctrl->dev), in pm8xxx_mpp_probe()
833 0, 0, pctrl->chip.ngpio); in pm8xxx_mpp_probe()
835 dev_err(pctrl->dev, "failed to add pin range\n"); in pm8xxx_mpp_probe()
839 platform_set_drvdata(pdev, pctrl); in pm8xxx_mpp_probe()
846 gpiochip_remove(&pctrl->chip); in pm8xxx_mpp_probe()
853 struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev); in pm8xxx_mpp_remove() local
855 gpiochip_remove(&pctrl->chip); in pm8xxx_mpp_remove()