5645 					      u32 int_reg)  in ipr_handle_other_interrupt()  argument
5651 	int_reg &= ~int_mask_reg;  in ipr_handle_other_interrupt()
5656 	if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {  in ipr_handle_other_interrupt()
5659 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;  in ipr_handle_other_interrupt()
5660 			if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {  in ipr_handle_other_interrupt()
5664 				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;  in ipr_handle_other_interrupt()
5675 	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_handle_other_interrupt()
5678 		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);  in ipr_handle_other_interrupt()
5683 	} else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {  in ipr_handle_other_interrupt()
5687 					"Spurious interrupt detected. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5689 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_handle_other_interrupt()
5693 		if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)  in ipr_handle_other_interrupt()
5695 		else if (int_reg & IPR_PCII_NO_HOST_RRQ)  in ipr_handle_other_interrupt()
5697 				"No Host RRQ. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5700 				"Permanent IOA failure. 0x%08X\n", int_reg);  in ipr_handle_other_interrupt()
5820 	u32 int_reg = 0;  in ipr_isr()  local
5846 				int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_isr()
5847 			} while (int_reg & IPR_PCII_HRRQ_UPDATED &&  in ipr_isr()
5851 			int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_isr()
5854 			   int_reg & IPR_PCII_HRRQ_UPDATED) {  in ipr_isr()
5864 		rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);  in ipr_isr()
8387 	volatile u32 int_reg;  in ipr_reset_next_stage()  local
8407 		int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_next_stage()
8411 		int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_reset_next_stage()
8412 		if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_reset_next_stage()
8417 			int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_next_stage()
8445 	volatile u32 int_reg;  in ipr_reset_enable_ioa()  local
8461 		int_reg = readl(ioa_cfg->regs.endian_swap_reg);  in ipr_reset_enable_ioa()
8464 	int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);  in ipr_reset_enable_ioa()
8466 	if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {  in ipr_reset_enable_ioa()
8469 		int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_enable_ioa()
8483 	int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);  in ipr_reset_enable_ioa()