Lines Matching refs:ct
256 if ((err = aty_valid_pll_ct(info, vclk_per, &pll->ct))) in aty_var_to_pll_ct()
258 if (M64_HAS(GTB_DSP) && (err = aty_dsp_gt(info, bpp, &pll->ct))) in aty_var_to_pll_ct()
268 …ret = par->ref_clk_per * pll->ct.pll_ref_div * pll->ct.vclk_post_div_real / pll->ct.vclk_fb_div / … in aty_pll_to_var_ct()
270 if(pll->ct.xres > 0) { in aty_pll_to_var_ct()
272 ret /= pll->ct.xres; in aty_pll_to_var_ct()
292 pll->ct.pll_ext_cntl, pll->ct.pll_gen_cntl, pll->ct.pll_vclk_cntl); in aty_set_pll_ct()
296 par->clk_wr_offset, pll->ct.vclk_fb_div, in aty_set_pll_ct()
297 pll->ct.pll_ref_div, pll->ct.vclk_post_div, pll->ct.vclk_post_div_real); in aty_set_pll_ct()
314 aty_st_pll_ct(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, par); in aty_set_pll_ct()
320 tmp |= ((pll->ct.vclk_post_div & 0x03U) << tmp2); in aty_set_pll_ct()
327 tmp |= pll->ct.pll_ext_cntl; in aty_set_pll_ct()
332 aty_st_pll_ct(tmp, (pll->ct.vclk_fb_div & 0xFFU), par); in aty_set_pll_ct()
334 …aty_st_pll_ct(PLL_GEN_CNTL, (pll->ct.pll_gen_cntl & (~(PLL_OVERRIDE | PLL_MCLK_RST))) | OSC_EN, pa… in aty_set_pll_ct()
337 aty_st_pll_ct(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl & ~(PLL_VCLK_RST), par); in aty_set_pll_ct()
340 aty_st_pll_ct(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, par); in aty_set_pll_ct()
341 aty_st_pll_ct(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, par); in aty_set_pll_ct()
359 aty_st_le32(DSP_CONFIG, pll->ct.dsp_config, par); in aty_set_pll_ct()
360 aty_st_le32(DSP_ON_OFF, pll->ct.dsp_on_off, par); in aty_set_pll_ct()
384 pll->ct.vclk_post_div = (aty_ld_pll_ct(VCLK_POST_DIV, par) >> tmp) & 0x03U; in aty_get_pll_ct()
386 pll->ct.pll_ext_cntl = aty_ld_pll_ct(PLL_EXT_CNTL, par) & 0x0FU; in aty_get_pll_ct()
387 pll->ct.vclk_fb_div = aty_ld_pll_ct(VCLK0_FB_DIV + clock, par) & 0xFFU; in aty_get_pll_ct()
388 pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_get_pll_ct()
389 pll->ct.mclk_fb_div = aty_ld_pll_ct(MCLK_FB_DIV, par); in aty_get_pll_ct()
391 pll->ct.pll_gen_cntl = aty_ld_pll_ct(PLL_GEN_CNTL, par); in aty_get_pll_ct()
392 pll->ct.pll_vclk_cntl = aty_ld_pll_ct(PLL_VCLK_CNTL, par); in aty_get_pll_ct()
395 pll->ct.dsp_config = aty_ld_le32(DSP_CONFIG, par); in aty_get_pll_ct()
396 pll->ct.dsp_on_off = aty_ld_le32(DSP_ON_OFF, par); in aty_get_pll_ct()
409 pll->ct.pll_ext_cntl = aty_ld_pll_ct(PLL_EXT_CNTL, par); in aty_init_pll_ct()
410 pll->ct.xclk_post_div = pll->ct.pll_ext_cntl & 0x07; in aty_init_pll_ct()
411 pll->ct.xclk_ref_div = 1; in aty_init_pll_ct()
412 switch (pll->ct.xclk_post_div) { in aty_init_pll_ct()
417 pll->ct.xclk_ref_div = 3; in aty_init_pll_ct()
418 pll->ct.xclk_post_div = 0; in aty_init_pll_ct()
422 printk(KERN_CRIT "atyfb: Unsupported xclk source: %d.\n", pll->ct.xclk_post_div); in aty_init_pll_ct()
425 pll->ct.mclk_fb_mult = 2; in aty_init_pll_ct()
426 if(pll->ct.pll_ext_cntl & PLL_MFB_TIMES_4_2B) { in aty_init_pll_ct()
427 pll->ct.mclk_fb_mult = 4; in aty_init_pll_ct()
428 pll->ct.xclk_post_div -= 1; in aty_init_pll_ct()
433 __func__, pll->ct.mclk_fb_mult, pll->ct.xclk_post_div); in aty_init_pll_ct()
439 pll->ct.xclkpagefaultdelay = ((memcntl & 0xc00) >> 10) + ((memcntl & 0x1000) >> 12) + trp + 2; in aty_init_pll_ct()
440 pll->ct.xclkmaxrasdelay = ((memcntl & 0x70000) >> 16) + trp + 2; in aty_init_pll_ct()
443 pll->ct.fifo_size = 32; in aty_init_pll_ct()
445 pll->ct.fifo_size = 24; in aty_init_pll_ct()
446 pll->ct.xclkpagefaultdelay += 2; in aty_init_pll_ct()
447 pll->ct.xclkmaxrasdelay += 3; in aty_init_pll_ct()
453 pll->ct.dsp_loop_latency = 10; in aty_init_pll_ct()
455 pll->ct.dsp_loop_latency = 8; in aty_init_pll_ct()
456 pll->ct.xclkpagefaultdelay += 2; in aty_init_pll_ct()
462 pll->ct.dsp_loop_latency = 9; in aty_init_pll_ct()
464 pll->ct.dsp_loop_latency = 8; in aty_init_pll_ct()
465 pll->ct.xclkpagefaultdelay += 1; in aty_init_pll_ct()
470 pll->ct.dsp_loop_latency = 11; in aty_init_pll_ct()
472 pll->ct.dsp_loop_latency = 10; in aty_init_pll_ct()
473 pll->ct.xclkpagefaultdelay += 1; in aty_init_pll_ct()
477 pll->ct.dsp_loop_latency = 8; in aty_init_pll_ct()
478 pll->ct.xclkpagefaultdelay += 3; in aty_init_pll_ct()
481 pll->ct.dsp_loop_latency = 11; in aty_init_pll_ct()
482 pll->ct.xclkpagefaultdelay += 3; in aty_init_pll_ct()
486 if (pll->ct.xclkmaxrasdelay <= pll->ct.xclkpagefaultdelay) in aty_init_pll_ct()
487 pll->ct.xclkmaxrasdelay = pll->ct.xclkpagefaultdelay + 1; in aty_init_pll_ct()
496 pll->ct.dsp_loop_latency = (dsp_config & DSP_LOOP_LATENCY) >> 16; in aty_init_pll_ct()
505 pll->ct.fifo_size = 32; in aty_init_pll_ct()
507 pll->ct.fifo_size = 24; in aty_init_pll_ct()
514 pll->ct.pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_init_pll_ct()
516 pll->ct.xclk_post_div_real = aty_postdividers[pll_ext_cntl & 0x07]; in aty_init_pll_ct()
520 pll->ct.mclk_fb_div = mclk_fb_div; in aty_init_pll_ct()
524 pll->ct.pll_ref_div = par->pll_per * 2 * 255 / par->ref_clk_per; in aty_init_pll_ct()
527 q = par->ref_clk_per * pll->ct.pll_ref_div * 8 / in aty_init_pll_ct()
528 (pll->ct.mclk_fb_mult * par->xclk_per); in aty_init_pll_ct()
538 pll->ct.xclk_post_div_real = aty_postdividers[xpost_div]; in aty_init_pll_ct()
539 pll->ct.mclk_fb_div = q * pll->ct.xclk_post_div_real / 8; in aty_init_pll_ct()
544 pll->ct.xclk_post_div = xpost_div; in aty_init_pll_ct()
545 pll->ct.xclk_ref_div = 1; in aty_init_pll_ct()
550 pllmclk = (1000000 * pll->ct.mclk_fb_mult * pll->ct.mclk_fb_div) / in aty_init_pll_ct()
551 (par->ref_clk_per * pll->ct.pll_ref_div); in aty_init_pll_ct()
553 __func__, pllmclk, pllmclk / pll->ct.xclk_post_div_real); in aty_init_pll_ct()
557 pll->ct.pll_gen_cntl = OSC_EN; in aty_init_pll_ct()
559 pll->ct.pll_gen_cntl = OSC_EN | DLL_PWDN /* | FORCE_DCLK_TRI_STATE */; in aty_init_pll_ct()
562 pll->ct.pll_ext_cntl = 0; in aty_init_pll_ct()
564 pll->ct.pll_ext_cntl = xpost_div; in aty_init_pll_ct()
566 if (pll->ct.mclk_fb_mult == 4) in aty_init_pll_ct()
567 pll->ct.pll_ext_cntl |= PLL_MFB_TIMES_4_2B; in aty_init_pll_ct()
570 pll->ct.pll_gen_cntl |= (xpost_div << 4); /* mclk == xclk */ in aty_init_pll_ct()
576 pll->ct.pll_gen_cntl |= (6 << 4); /* mclk == sclk */ in aty_init_pll_ct()
578 q = par->ref_clk_per * pll->ct.pll_ref_div * 4 / par->mclk_per; in aty_init_pll_ct()
588 pll->ct.sclk_fb_div = q * sclk_post_div_real / 8; in aty_init_pll_ct()
589 pll->ct.spll_cntl2 = mpost_div << 4; in aty_init_pll_ct()
591 pllsclk = (1000000 * 2 * pll->ct.sclk_fb_div) / in aty_init_pll_ct()
592 (par->ref_clk_per * pll->ct.pll_ref_div); in aty_init_pll_ct()
599 pll->ct.ext_vpll_cntl = aty_ld_pll_ct(EXT_VPLL_CNTL, par); in aty_init_pll_ct()
600 pll->ct.ext_vpll_cntl &= ~(EXT_VPLL_EN | EXT_VPLL_VGA_EN | EXT_VPLL_INSYNC); in aty_init_pll_ct()
618 aty_st_pll_ct(SCLK_FB_DIV, pll->ct.sclk_fb_div, par); in aty_resume_pll_ct()
619 aty_st_pll_ct(SPLL_CNTL2, pll->ct.spll_cntl2, par); in aty_resume_pll_ct()
627 aty_st_pll_ct(PLL_REF_DIV, pll->ct.pll_ref_div, par); in aty_resume_pll_ct()
628 aty_st_pll_ct(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, par); in aty_resume_pll_ct()
629 aty_st_pll_ct(MCLK_FB_DIV, pll->ct.mclk_fb_div, par); in aty_resume_pll_ct()
630 aty_st_pll_ct(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, par); in aty_resume_pll_ct()
631 aty_st_pll_ct(EXT_VPLL_CNTL, pll->ct.ext_vpll_cntl, par); in aty_resume_pll_ct()