Lines Matching refs:pm4
1038 uint32_t *pm4; in amdgpu_bo_eviction_test() local
1048 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_bo_eviction_test()
1049 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_bo_eviction_test()
1124 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_COPY_SI, 0, 0, 0, in amdgpu_bo_eviction_test()
1126 pm4[i++] = 0xffffffff & bo2_mc; in amdgpu_bo_eviction_test()
1127 pm4[i++] = 0xffffffff & bo1_mc; in amdgpu_bo_eviction_test()
1128 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_bo_eviction_test()
1129 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_bo_eviction_test()
1131 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); in amdgpu_bo_eviction_test()
1133 pm4[i++] = sdma_write_length - 1; in amdgpu_bo_eviction_test()
1135 pm4[i++] = sdma_write_length; in amdgpu_bo_eviction_test()
1136 pm4[i++] = 0; in amdgpu_bo_eviction_test()
1137 pm4[i++] = 0xffffffff & bo1_mc; in amdgpu_bo_eviction_test()
1138 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_bo_eviction_test()
1139 pm4[i++] = 0xffffffff & bo2_mc; in amdgpu_bo_eviction_test()
1140 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_bo_eviction_test()
1145 i, pm4, in amdgpu_bo_eviction_test()
1173 free(pm4); in amdgpu_bo_eviction_test()
1558 uint32_t *pm4; in amdgpu_command_submission_write_linear_helper_with_secure() local
1569 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_command_submission_write_linear_helper_with_secure()
1570 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_command_submission_write_linear_helper_with_secure()
1612 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_WRITE, 0, 0, 0, in amdgpu_command_submission_write_linear_helper_with_secure()
1615 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in amdgpu_command_submission_write_linear_helper_with_secure()
1618 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1619 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1621 pm4[i++] = sdma_write_length - 1; in amdgpu_command_submission_write_linear_helper_with_secure()
1623 pm4[i++] = sdma_write_length; in amdgpu_command_submission_write_linear_helper_with_secure()
1625 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1628 pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 + sdma_write_length); in amdgpu_command_submission_write_linear_helper_with_secure()
1629 pm4[i++] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in amdgpu_command_submission_write_linear_helper_with_secure()
1630 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1631 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1633 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1637 ip_type, ring_id, i, pm4, in amdgpu_command_submission_write_linear_helper_with_secure()
1648 memset((void*)pm4, 0, pm4_dw * sizeof(uint32_t)); in amdgpu_command_submission_write_linear_helper_with_secure()
1649 pm4[i++] = PACKET3(PACKET3_ATOMIC_MEM, 7); in amdgpu_command_submission_write_linear_helper_with_secure()
1655 pm4[i++] = (TC_OP_ATOMIC_CMPSWAP_RTN_32 | in amdgpu_command_submission_write_linear_helper_with_secure()
1659 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1660 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1661 pm4[i++] = 0x12345678; in amdgpu_command_submission_write_linear_helper_with_secure()
1662 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1663 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1664 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1665 pm4[i++] = 0x100; in amdgpu_command_submission_write_linear_helper_with_secure()
1667 ip_type, ring_id, i, pm4, in amdgpu_command_submission_write_linear_helper_with_secure()
1673 memset((void*)pm4, 0, pm4_dw * sizeof(uint32_t)); in amdgpu_command_submission_write_linear_helper_with_secure()
1678 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_ATOMIC, in amdgpu_command_submission_write_linear_helper_with_secure()
1683 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1684 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1685 pm4[i++] = 0x12345678; in amdgpu_command_submission_write_linear_helper_with_secure()
1686 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1687 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1688 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1689 pm4[i++] = 0x100; in amdgpu_command_submission_write_linear_helper_with_secure()
1691 ip_type, ring_id, i, pm4, in amdgpu_command_submission_write_linear_helper_with_secure()
1710 memset((void*)pm4, 0, pm4_dw * sizeof(uint32_t)); in amdgpu_command_submission_write_linear_helper_with_secure()
1711 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_ATOMIC, in amdgpu_command_submission_write_linear_helper_with_secure()
1716 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_write_linear_helper_with_secure()
1717 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_write_linear_helper_with_secure()
1718 pm4[i++] = 0x87654321; in amdgpu_command_submission_write_linear_helper_with_secure()
1719 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1720 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_write_linear_helper_with_secure()
1721 pm4[i++] = 0x0; in amdgpu_command_submission_write_linear_helper_with_secure()
1722 pm4[i++] = 0x100; in amdgpu_command_submission_write_linear_helper_with_secure()
1724 ip_type, ring_id, i, pm4, in amdgpu_command_submission_write_linear_helper_with_secure()
1741 free(pm4); in amdgpu_command_submission_write_linear_helper_with_secure()
1767 uint32_t *pm4; in amdgpu_command_submission_const_fill_helper() local
1777 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_command_submission_const_fill_helper()
1778 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_command_submission_const_fill_helper()
1816 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_CONSTANT_FILL_SI, in amdgpu_command_submission_const_fill_helper()
1819 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_const_fill_helper()
1820 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_const_fill_helper()
1821 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 16; in amdgpu_command_submission_const_fill_helper()
1823 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, in amdgpu_command_submission_const_fill_helper()
1825 pm4[i++] = 0xffffffff & bo_mc; in amdgpu_command_submission_const_fill_helper()
1826 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_const_fill_helper()
1827 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_const_fill_helper()
1829 pm4[i++] = sdma_write_length - 1; in amdgpu_command_submission_const_fill_helper()
1831 pm4[i++] = sdma_write_length; in amdgpu_command_submission_const_fill_helper()
1836 pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4); in amdgpu_command_submission_const_fill_helper()
1837 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_const_fill_helper()
1838 pm4[i++] = PACKET3_DMA_DATA_SI_ENGINE(0) | in amdgpu_command_submission_const_fill_helper()
1842 pm4[i++] = 0xffffffff & bo_mc; in amdgpu_command_submission_const_fill_helper()
1843 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_const_fill_helper()
1844 pm4[i++] = sdma_write_length; in amdgpu_command_submission_const_fill_helper()
1846 pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); in amdgpu_command_submission_const_fill_helper()
1847 pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) | in amdgpu_command_submission_const_fill_helper()
1851 pm4[i++] = 0xdeadbeaf; in amdgpu_command_submission_const_fill_helper()
1852 pm4[i++] = 0; in amdgpu_command_submission_const_fill_helper()
1853 pm4[i++] = 0xfffffffc & bo_mc; in amdgpu_command_submission_const_fill_helper()
1854 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_command_submission_const_fill_helper()
1855 pm4[i++] = sdma_write_length; in amdgpu_command_submission_const_fill_helper()
1861 i, pm4, in amdgpu_command_submission_const_fill_helper()
1881 free(pm4); in amdgpu_command_submission_const_fill_helper()
1900 uint32_t *pm4; in amdgpu_command_submission_copy_linear_helper() local
1910 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_command_submission_copy_linear_helper()
1911 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_command_submission_copy_linear_helper()
1965 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_COPY_SI, in amdgpu_command_submission_copy_linear_helper()
1968 pm4[i++] = 0xffffffff & bo2_mc; in amdgpu_command_submission_copy_linear_helper()
1969 pm4[i++] = 0xffffffff & bo1_mc; in amdgpu_command_submission_copy_linear_helper()
1970 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1971 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1973 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, in amdgpu_command_submission_copy_linear_helper()
1977 pm4[i++] = sdma_write_length - 1; in amdgpu_command_submission_copy_linear_helper()
1979 pm4[i++] = sdma_write_length; in amdgpu_command_submission_copy_linear_helper()
1980 pm4[i++] = 0; in amdgpu_command_submission_copy_linear_helper()
1981 pm4[i++] = 0xffffffff & bo1_mc; in amdgpu_command_submission_copy_linear_helper()
1982 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1983 pm4[i++] = 0xffffffff & bo2_mc; in amdgpu_command_submission_copy_linear_helper()
1984 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1989 pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4); in amdgpu_command_submission_copy_linear_helper()
1990 pm4[i++] = 0xfffffffc & bo1_mc; in amdgpu_command_submission_copy_linear_helper()
1991 pm4[i++] = PACKET3_DMA_DATA_SI_ENGINE(0) | in amdgpu_command_submission_copy_linear_helper()
1996 pm4[i++] = 0xfffffffc & bo2_mc; in amdgpu_command_submission_copy_linear_helper()
1997 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
1998 pm4[i++] = sdma_write_length; in amdgpu_command_submission_copy_linear_helper()
2000 pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); in amdgpu_command_submission_copy_linear_helper()
2001 pm4[i++] = PACKET3_DMA_DATA_ENGINE(0) | in amdgpu_command_submission_copy_linear_helper()
2005 pm4[i++] = 0xfffffffc & bo1_mc; in amdgpu_command_submission_copy_linear_helper()
2006 pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
2007 pm4[i++] = 0xfffffffc & bo2_mc; in amdgpu_command_submission_copy_linear_helper()
2008 pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32; in amdgpu_command_submission_copy_linear_helper()
2009 pm4[i++] = sdma_write_length; in amdgpu_command_submission_copy_linear_helper()
2015 i, pm4, in amdgpu_command_submission_copy_linear_helper()
2039 free(pm4); in amdgpu_command_submission_copy_linear_helper()
2161 uint32_t *pm4 = NULL; in amdgpu_userptr_test() local
2173 pm4 = calloc(pm4_dw, sizeof(*pm4)); in amdgpu_userptr_test()
2174 CU_ASSERT_NOT_EQUAL(pm4, NULL); in amdgpu_userptr_test()
2207 pm4[i++] = SDMA_PACKET_SI(SDMA_OPCODE_WRITE, 0, 0, 0, in amdgpu_userptr_test()
2210 pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in amdgpu_userptr_test()
2212 pm4[i++] = 0xffffffff & bo_mc; in amdgpu_userptr_test()
2213 pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32; in amdgpu_userptr_test()
2215 pm4[i++] = sdma_write_length - 1; in amdgpu_userptr_test()
2217 pm4[i++] = sdma_write_length; in amdgpu_userptr_test()
2220 pm4[i++] = 0xdeadbeaf; in amdgpu_userptr_test()
2223 pm4[0] = 0x0; in amdgpu_userptr_test()
2229 i, pm4, in amdgpu_userptr_test()
2238 free(pm4); in amdgpu_userptr_test()