45 void si_init_resource_fields(struct si_screen *sscreen, struct si_resource *res, uint64_t size,  in si_init_resource_fields()  argument
59       if (sscreen->info.smart_access_memory)  in si_init_resource_fields()
92       if (!sscreen->info.is_amdgpu)  in si_init_resource_fields()
111        (sscreen->debug_flags & DBG(TMZ) &&  in si_init_resource_fields()
118    if (sscreen->debug_flags & DBG(NO_WC))  in si_init_resource_fields()
137    if (sscreen->info.gfx_level >= GFX9 &&  in si_init_resource_fields()
142        sscreen->info.drm_major == 3 && sscreen->info.drm_minor >= 47) {  in si_init_resource_fields()
149        sscreen->options.mall_noalloc)  in si_init_resource_fields()
160       if (!sscreen->info.smart_access_memory &&  in si_init_resource_fields()
161           sscreen->info.has_dedicated_vram &&  in si_init_resource_fields()
163           size >= sscreen->options.max_vram_map_size)  in si_init_resource_fields()
168 bool si_alloc_resource(struct si_screen *sscreen, struct si_resource *res)  in si_alloc_resource()  argument
173    new_buf = sscreen->ws->buffer_create(sscreen->ws, res->bo_size, 1 << res->bo_alignment_log2,  in si_alloc_resource()
185    res->gpu_address = sscreen->ws->buffer_get_virtual_address(res->buf);  in si_alloc_resource()
193       assert((start >> 32) == sscreen->info.address32_hi);  in si_alloc_resource()
194       assert((last >> 32) == sscreen->info.address32_hi);  in si_alloc_resource()
197    radeon_bo_reference(sscreen->ws, &old_buf, NULL);  in si_alloc_resource()
203    if (sscreen->debug_flags & DBG(VM) && res->b.b.target == PIPE_BUFFER) {  in si_alloc_resource()
209       si_screen_clear_buffer(sscreen, &res->b.b, 0, res->bo_size, 0, SI_OP_SYNC_AFTER);  in si_alloc_resource()
217       struct si_screen *sscreen = (struct si_screen *)screen;  in si_resource_destroy()  local
223       util_idalloc_mt_free(&sscreen->buffer_ids, buffer->b.buffer_id_unique);  in si_resource_destroy()
583    struct si_screen *sscreen = (struct si_screen *)screen;  in si_buffer_create()  local
586                              templ->width0 <= sscreen->options.tc_max_cpu_storage_size);  in si_buffer_create()
591    si_init_resource_fields(sscreen, buf, templ->width0, alignment);  in si_buffer_create()
593    buf->b.buffer_id_unique = util_idalloc_mt_alloc(&sscreen->buffer_ids);  in si_buffer_create()
595    if (!si_alloc_resource(sscreen, buf)) {  in si_buffer_create()
631    struct si_screen *sscreen = (struct si_screen *)screen;  in si_buffer_from_user_memory()  local
632    struct radeon_winsys *ws = sscreen->ws;  in si_buffer_from_user_memory()
641    buf->b.buffer_id_unique = util_idalloc_mt_alloc(&sscreen->buffer_ids);  in si_buffer_from_user_memory()
663    struct si_screen *sscreen = (struct si_screen *)screen;  in si_buffer_from_winsys_buffer()  local
669    enum radeon_bo_domain domains = sscreen->ws->buffer_get_initial_domain(imported_buf);  in si_buffer_from_winsys_buffer()
674    if (sscreen->ws->buffer_get_flags)  in si_buffer_from_winsys_buffer()
675       res->flags |= sscreen->ws->buffer_get_flags(imported_buf);  in si_buffer_from_winsys_buffer()
696    si_init_resource_fields(sscreen, res, imported_buf->size,  in si_buffer_from_winsys_buffer()
700    res->b.buffer_id_unique = util_idalloc_mt_alloc(&sscreen->buffer_ids);  in si_buffer_from_winsys_buffer()
702    res->gpu_address = sscreen->ws->buffer_get_virtual_address(res->buf) + offset;  in si_buffer_from_winsys_buffer()
756 void si_init_screen_buffer_functions(struct si_screen *sscreen)  in si_init_screen_buffer_functions()  argument
758    sscreen->b.resource_create = si_resource_create;  in si_init_screen_buffer_functions()
759    sscreen->b.resource_destroy = si_resource_destroy;  in si_init_screen_buffer_functions()
760    sscreen->b.resource_from_user_memory = si_buffer_from_user_memory;  in si_init_screen_buffer_functions()