51    struct si_fine_fence fine;  member
210       si_resource_reference(&(*sdst)->fine.buf, NULL);  in si_fence_reference()
241 static bool si_fine_fence_signaled(struct radeon_winsys *rws, const struct si_fine_fence *fine)  in si_fine_fence_signaled()  argument
244       rws->buffer_map(rws, fine->buf->buf, NULL, PIPE_MAP_READ | PIPE_MAP_UNSYNCHRONIZED);  in si_fine_fence_signaled()
248    uint32_t *fence = (uint32_t *)(map + fine->offset);  in si_fine_fence_signaled()
252 static void si_fine_fence_set(struct si_context *ctx, struct si_fine_fence *fine, unsigned flags)  in si_fine_fence_set()  argument
259    u_upload_alloc(ctx->cached_gtt_allocator, 0, 4, 4, &fine->offset,  in si_fine_fence_set()
260                   (struct pipe_resource **)&fine->buf, (void **)&fence_ptr);  in si_fine_fence_set()
261    if (!fine->buf)  in si_fine_fence_set()
269       si_cp_write_data(ctx, fine->buf, fine->offset, 4, V_370_MEM, V_370_PFP, &value);  in si_fine_fence_set()
271       uint64_t fence_va = fine->buf->gpu_address + fine->offset;  in si_fine_fence_set()
273 …   radeon_add_to_buffer_list(ctx, &ctx->gfx_cs, fine->buf, RADEON_USAGE_WRITE | RADEON_PRIO_QUERY);  in si_fine_fence_set()
325    if (sfence->fine.buf && si_fine_fence_signaled(rws, &sfence->fine)) {  in si_fence_finish()
327       si_resource_reference(&sfence->fine.buf, NULL);  in si_fence_finish()
375    if (sfence->fine.buf && si_fine_fence_signaled(rws, &sfence->fine))  in si_fence_finish()
463    struct si_fine_fence fine = {};  in si_flush_all_queues()  local
477       si_fine_fence_set(sctx, &fine, flags);  in si_flush_all_queues()
532       new_fence->fine = fine;  in si_flush_all_queues()
533       fine.buf = NULL;  in si_flush_all_queues()
540    assert(!fine.buf);  in si_flush_all_queues()