Lines Matching refs:lane_mask
1243 uint16_t lane_mask, in Simulator() argument
1251 bool access = (lane_mask & (1 << (i * lane_size))) != 0; in Simulator()
1753 uint16_t lane_mask = GetPrintRegLaneMask(format); in Simulator() local
1754 PrintVRegistersForStructuredAccess(rt_code, reg_count, lane_mask, format); in Simulator()
1760 VIXL_ASSERT((lane_mask & access_mask) != 0); in Simulator()
1761 lane_mask = PrintPartialAccess(access_mask, in Simulator()
1762 lane_mask, in Simulator()
1784 uint16_t lane_mask = 1 << (lane * lane_size_in_bytes); in Simulator() local
1785 PrintVRegistersForStructuredAccess(rt_code, reg_count, lane_mask, format); in Simulator()
1786 PrintPartialAccess(lane_mask, 0, reg_count, lane_size_in_bytes, op, address); in Simulator()
1802 uint16_t lane_mask = GetPrintRegLaneMask(format); in Simulator() local
1803 PrintVRegistersForStructuredAccess(rt_code, reg_count, lane_mask, format); in Simulator()
1804 PrintPartialAccess(lane_mask, 0, reg_count, lane_size_in_bytes, op, address); in Simulator()