Lines Matching refs:Is
193 VIXL_CHECK(NoReg.Is(NoVReg)); in TEST()
194 VIXL_CHECK(NoVReg.Is(NoReg)); in TEST()
196 VIXL_CHECK(NoVReg.Is(NoReg)); in TEST()
197 VIXL_CHECK(NoReg.Is(NoVReg)); in TEST()
199 VIXL_CHECK(NoReg.Is(NoCPUReg)); in TEST()
200 VIXL_CHECK(NoCPUReg.Is(NoReg)); in TEST()
202 VIXL_CHECK(NoVReg.Is(NoCPUReg)); in TEST()
203 VIXL_CHECK(NoCPUReg.Is(NoVReg)); in TEST()
205 VIXL_CHECK(NoVReg.Is(NoCPUReg)); in TEST()
206 VIXL_CHECK(NoCPUReg.Is(NoVReg)); in TEST()
216 VIXL_CHECK(WRegister(0).Is(w0)); in TEST()
217 VIXL_CHECK(XRegister(1).Is(x1)); in TEST()
219 VIXL_CHECK(BRegister(2).Is(b2)); in TEST()
220 VIXL_CHECK(HRegister(3).Is(h3)); in TEST()
221 VIXL_CHECK(SRegister(4).Is(s4)); in TEST()
222 VIXL_CHECK(DRegister(5).Is(d5)); in TEST()
223 VIXL_CHECK(QRegister(6).Is(q6)); in TEST()
225 VIXL_CHECK(ZRegister(7).Is(z7)); in TEST()
226 VIXL_CHECK(PRegister(8).Is(p8)); in TEST()
232 VIXL_CHECK(Register(0, kWRegSize).Is(w0)); in TEST()
233 VIXL_CHECK(Register(1, kXRegSize).Is(x1)); in TEST()
239 VIXL_CHECK(VRegister(0).Is(v0)); in TEST()
240 VIXL_CHECK(VRegister(1).Is(v1)); in TEST()
241 VIXL_CHECK(VRegister(2).Is(v2)); in TEST()
242 VIXL_CHECK(VRegister(3).Is(v3)); in TEST()
243 VIXL_CHECK(VRegister(4).Is(v4)); in TEST()
246 VIXL_CHECK(VRegister(0, kBRegSize).Is(b0)); in TEST()
247 VIXL_CHECK(VRegister(1, kHRegSize).Is(h1)); in TEST()
248 VIXL_CHECK(VRegister(2, kSRegSize).Is(s2)); in TEST()
249 VIXL_CHECK(VRegister(3, kDRegSize).Is(d3)); in TEST()
250 VIXL_CHECK(VRegister(4, kQRegSize).Is(q4)); in TEST()
253 VIXL_CHECK(VRegister(0, kBRegSize, 1).Is(b0)); in TEST()
254 VIXL_CHECK(VRegister(1, kHRegSize, 1).Is(h1)); in TEST()
255 VIXL_CHECK(VRegister(2, kSRegSize, 1).Is(s2)); in TEST()
256 VIXL_CHECK(VRegister(3, kDRegSize, 1).Is(d3)); in TEST()
257 VIXL_CHECK(VRegister(4, kQRegSize, 1).Is(q4)); in TEST()
259 VIXL_CHECK(VRegister(0, kSRegSize, 2).Is(v0.V2H())); in TEST()
261 VIXL_CHECK(VRegister(1, kDRegSize, 1).Is(v1.V1D())); in TEST()
262 VIXL_CHECK(VRegister(2, kDRegSize, 2).Is(v2.V2S())); in TEST()
263 VIXL_CHECK(VRegister(3, kDRegSize, 4).Is(v3.V4H())); in TEST()
264 VIXL_CHECK(VRegister(4, kDRegSize, 8).Is(v4.V8B())); in TEST()
266 VIXL_CHECK(VRegister(5, kQRegSize, 2).Is(v5.V2D())); in TEST()
267 VIXL_CHECK(VRegister(6, kQRegSize, 4).Is(v6.V4S())); in TEST()
268 VIXL_CHECK(VRegister(7, kQRegSize, 8).Is(v7.V8H())); in TEST()
269 VIXL_CHECK(VRegister(8, kQRegSize, 16).Is(v8.V16B())); in TEST()
272 VIXL_CHECK(VRegister(0, kFormatB).Is(b0)); in TEST()
273 VIXL_CHECK(VRegister(1, kFormatH).Is(h1)); in TEST()
274 VIXL_CHECK(VRegister(2, kFormatS).Is(s2)); in TEST()
275 VIXL_CHECK(VRegister(3, kFormatD).Is(d3)); in TEST()
276 VIXL_CHECK(VRegister(4, kFormat8B).Is(v4.V8B())); in TEST()
277 VIXL_CHECK(VRegister(5, kFormat16B).Is(v5.V16B())); in TEST()
278 VIXL_CHECK(VRegister(6, kFormat2H).Is(v6.V2H())); in TEST()
279 VIXL_CHECK(VRegister(7, kFormat4H).Is(v7.V4H())); in TEST()
280 VIXL_CHECK(VRegister(8, kFormat8H).Is(v8.V8H())); in TEST()
281 VIXL_CHECK(VRegister(9, kFormat2S).Is(v9.V2S())); in TEST()
282 VIXL_CHECK(VRegister(10, kFormat4S).Is(v10.V4S())); in TEST()
283 VIXL_CHECK(VRegister(11, kFormat1D).Is(v11.V1D())); in TEST()
284 VIXL_CHECK(VRegister(12, kFormat2D).Is(v12.V2D())); in TEST()
290 VIXL_CHECK(ZRegister(0, kBRegSize).Is(z0.VnB())); in TEST()
291 VIXL_CHECK(ZRegister(1, kHRegSize).Is(z1.VnH())); in TEST()
292 VIXL_CHECK(ZRegister(2, kSRegSize).Is(z2.VnS())); in TEST()
293 VIXL_CHECK(ZRegister(3, kDRegSize).Is(z3.VnD())); in TEST()
296 VIXL_CHECK(ZRegister(0, kFormatVnB).Is(z0.VnB())); in TEST()
297 VIXL_CHECK(ZRegister(1, kFormatVnH).Is(z1.VnH())); in TEST()
298 VIXL_CHECK(ZRegister(2, kFormatVnS).Is(z2.VnS())); in TEST()
299 VIXL_CHECK(ZRegister(3, kFormatVnD).Is(z3.VnD())); in TEST()
305 VIXL_CHECK(PRegisterWithLaneSize(0, kBRegSize).Is(p0.VnB())); in TEST()
306 VIXL_CHECK(PRegisterWithLaneSize(1, kHRegSize).Is(p1.VnH())); in TEST()
307 VIXL_CHECK(PRegisterWithLaneSize(2, kSRegSize).Is(p2.VnS())); in TEST()
308 VIXL_CHECK(PRegisterWithLaneSize(3, kDRegSize).Is(p3.VnD())); in TEST()
311 VIXL_CHECK(PRegisterWithLaneSize(0, kFormatVnB).Is(p0.VnB())); in TEST()
312 VIXL_CHECK(PRegisterWithLaneSize(1, kFormatVnH).Is(p1.VnH())); in TEST()
313 VIXL_CHECK(PRegisterWithLaneSize(2, kFormatVnS).Is(p2.VnS())); in TEST()
314 VIXL_CHECK(PRegisterWithLaneSize(3, kFormatVnD).Is(p3.VnD())); in TEST()
316 VIXL_CHECK(PRegisterZ(0).Is(p0.Zeroing())); in TEST()
317 VIXL_CHECK(PRegisterM(1).Is(p1.Merging())); in TEST()
323 VIXL_CHECK(CPURegister(0, kWRegSize, CPURegister::kRegister).Is(w0)); in TEST()
324 VIXL_CHECK(CPURegister(1, kXRegSize, CPURegister::kRegister).Is(x1)); in TEST()
326 VIXL_CHECK(CPURegister(2, kBRegSize, CPURegister::kVRegister).Is(b2)); in TEST()
327 VIXL_CHECK(CPURegister(3, kHRegSize, CPURegister::kVRegister).Is(h3)); in TEST()
328 VIXL_CHECK(CPURegister(4, kSRegSize, CPURegister::kVRegister).Is(s4)); in TEST()
329 VIXL_CHECK(CPURegister(5, kDRegSize, CPURegister::kVRegister).Is(d5)); in TEST()
330 VIXL_CHECK(CPURegister(6, kQRegSize, CPURegister::kVRegister).Is(q6)); in TEST()
331 VIXL_CHECK(CPURegister(7, kQRegSize, CPURegister::kVRegister).Is(v7)); in TEST()
334 .Is(z0)); in TEST()
336 .Is(p1)); in TEST()
366 VIXL_CHECK(out.Is(reg)); in CPURegisterByValueHelper()
601 VIXL_CHECK(z0.Is(z0)); in TEST()
602 VIXL_CHECK(!z0.Is(z1)); in TEST()
603 VIXL_CHECK(!z0.Is(v0)); in TEST()
604 VIXL_CHECK(!z0.Is(b0)); in TEST()
605 VIXL_CHECK(!z0.Is(q0)); in TEST()
631 VIXL_ASSERT(v6.B().Is(b6)); in TEST()
632 VIXL_ASSERT(v7.H().Is(h7)); in TEST()
633 VIXL_ASSERT(v8.S().Is(s8)); in TEST()
634 VIXL_ASSERT(v9.D().Is(d9)); in TEST()
636 VIXL_ASSERT(z6.B().Is(b6)); in TEST()
637 VIXL_ASSERT(z7.H().Is(h7)); in TEST()
638 VIXL_ASSERT(z8.S().Is(s8)); in TEST()
639 VIXL_ASSERT(z9.D().Is(d9)); in TEST()
646 VIXL_CHECK(!z6.VnB().Is(b6)); in TEST()
647 VIXL_CHECK(!z7.VnH().Is(h7)); in TEST()
648 VIXL_CHECK(!z8.VnS().Is(s8)); in TEST()
649 VIXL_CHECK(!z9.VnD().Is(d9)); in TEST()
651 VIXL_CHECK(!z6.VnB().Is(v6.B())); in TEST()
652 VIXL_CHECK(!z7.VnH().Is(v7.H())); in TEST()
653 VIXL_CHECK(!z8.VnS().Is(v8.S())); in TEST()
654 VIXL_CHECK(!z9.VnD().Is(v9.D())); in TEST()
656 VIXL_CHECK(!z6.VnB().Is(z6.B())); in TEST()
657 VIXL_CHECK(!z7.VnH().Is(z7.H())); in TEST()
658 VIXL_CHECK(!z8.VnS().Is(z8.S())); in TEST()
659 VIXL_CHECK(!z9.VnD().Is(z9.D())); in TEST()
955 VIXL_CHECK(r_x0.Is(x_x0)); in TEST()
956 VIXL_CHECK(x_x0.Is(r_x0)); in TEST()
957 VIXL_CHECK(r_w0.Is(w_w0)); in TEST()
958 VIXL_CHECK(w_w0.Is(r_w0)); in TEST()
965 VIXL_CHECK(r_x1.Is(x_x1)); in TEST()
966 VIXL_CHECK(x_x1.Is(r_x1)); in TEST()
967 VIXL_CHECK(r_w1.Is(w_w1)); in TEST()
968 VIXL_CHECK(w_w1.Is(r_w1)); in TEST()
975 VIXL_CHECK(cpu_x2.Is(x_x2)); in TEST()
976 VIXL_CHECK(x_x2.Is(cpu_x2)); in TEST()
977 VIXL_CHECK(cpu_w2.Is(w_w2)); in TEST()
978 VIXL_CHECK(w_w2.Is(cpu_w2)); in TEST()
1132 VIXL_CHECK(temp1.Is(w16)); in TEST()
1133 VIXL_CHECK(temp2.Is(x17)); in TEST()
1139 VIXL_CHECK(temp1.Is(x16)); in TEST()
1140 VIXL_CHECK(temp2.Is(w17)); in TEST()
1150 VIXL_CHECK(temp.Is(h31)); in TEST()
1155 VIXL_CHECK(temp.Is(s31)); in TEST()
1160 VIXL_CHECK(temp.Is(d31)); in TEST()
1165 VIXL_CHECK(temp.Is(q31)); in TEST()
1170 VIXL_CHECK(temp.Is(d31)); in TEST()
1175 VIXL_CHECK(temp.Is(s31)); in TEST()
1187 VIXL_CHECK(temp.Is(z31)); in TEST()