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Searched defs:NewOpc (Results 1 – 25 of 49) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86FixupLEAs.cpp577 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local
615 unsigned NewOpc = in processInstrForSlow3OpLEA() local
621 unsigned NewOpc = getADDriFromLEA(MI.getOpcode(), Offset); in processInstrForSlow3OpLEA() local
648 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local
670 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local
DX86EvexToVex.cpp147 static bool performCustomAdjustments(MachineInstr &MI, unsigned NewOpc) { in performCustomAdjustments()
259 unsigned NewOpc = I->VexOpcode; in CompressEvexToVexImpl() local
DX86MCInstLower.cpp502 unsigned NewOpc; in Lower() local
527 unsigned NewOpc; in Lower() local
570 unsigned NewOpc; in Lower() local
642 unsigned NewOpc; in Lower() local
806 unsigned NewOpc; in Lower() local
831 unsigned NewOpc; in Lower() local
DX86ISelDAGToDAG.cpp830 unsigned NewOpc; in PreprocessISelDAG() local
863 unsigned NewOpc; in PreprocessISelDAG() local
886 unsigned NewOpc = N->getOpcode() == ISD::ANY_EXTEND in PreprocessISelDAG() local
1260 unsigned NewOpc; in PostprocessISelDAG() local
1301 unsigned NewOpc; in PostprocessISelDAG() local
3076 unsigned NewOpc = SelectOpcode(X86::NEG64m, X86::NEG32m, X86::NEG16m, in foldLoadStoreIntoMemOperand() local
3091 unsigned NewOpc = in foldLoadStoreIntoMemOperand() local
3181 unsigned NewOpc = SelectRegOpcode(Opc); in foldLoadStoreIntoMemOperand() local
3586 unsigned NewOpc = NVT == MVT::i64 ? X86::MOV32ri64 : X86::MOV32ri; in matchBEXTRFromAndImm() local
3602 unsigned NewOpc = NVT == MVT::i64 ? X86::MOV32ri64 : X86::MOV32ri; in matchBEXTRFromAndImm() local
[all …]
DX86InstructionSelector.cpp529 unsigned NewOpc = getLoadStoreOp(Ty, RB, Opc, MemOp.getAlignment()); in selectLoadStoreOp() local
571 unsigned NewOpc = getLeaOP(Ty, STI); in selectFrameIndexOrGep() local
622 unsigned NewOpc = getLeaOP(Ty, STI); in selectGlobalValue() local
654 unsigned NewOpc; in selectConstant() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp1323 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local
1423 unsigned NewOpc; in MergeBaseUpdateLoadStore() local
1535 unsigned NewOpc; in MergeBaseUpdateLSDouble() local
1629 bool isDef, unsigned NewOpc, unsigned Reg, in InsertLDR_STR()
1701 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1725 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1953 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local
2148 DebugLoc &dl, unsigned &NewOpc, in CanFormLdStDWord()
2320 unsigned NewOpc = 0; in RescheduleOps() local
DThumb2InstrInfo.cpp531 unsigned NewOpc = isSub ? IsSP ? ARM::t2SUBspImm12 : ARM::t2SUBri12 in rewriteT2FrameIndex() local
564 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
DARMExpandPseudoInsts.cpp1273 unsigned NewOpc = AFI->isThumbFunction() ? ARM::t2MOVi16 : ARM::MOVi16; in ExpandMI() local
1315 unsigned NewOpc; in ExpandMI() local
1588 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local
1619 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local
DARMConstantIslandPass.cpp1773 unsigned NewOpc = 0; in optimizeThumb2Instructions() local
1824 unsigned NewOpc = 0; in optimizeThumb2Branches() local
1858 unsigned NewOpc = 0; in optimizeThumb2Branches() member
1872 unsigned NewOpc = 0; in optimizeThumb2Branches() local
DARMInstructionSelector.cpp901 unsigned NewOpc = selectSimpleExtOpc(I.getOpcode(), SrcSize); in select() local
1097 const auto NewOpc = selectLoadStoreOpCode(I.getOpcode(), RegBank, ValSize); in select() local
DThumbRegisterInfo.cpp405 unsigned NewOpc = convertToNonSPOpcode(Opcode); in rewriteFrameIndex() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64CondBrTuning.cpp100 unsigned NewOpc = TII->convertToFlagSettingOpc(MI.getOpcode(), Is64Bit); in convertToFlagSetting() local
DAArch64AdvSIMDScalarPass.cpp292 unsigned NewOpc = getTransformOpcode(OldOpc); in transformInstruction() local
DAArch64InstructionSelector.cpp1853 const unsigned NewOpc = in select() local
1937 unsigned NewOpc = I.getOpcode() == TargetOpcode::G_SMULH ? AArch64::SMULHrr in select() local
1970 const unsigned NewOpc = selectBinaryOp(I.getOpcode(), RB.getID(), OpSize); in select() local
2229 const unsigned NewOpc = selectFPConvOpc(Opcode, DstTy, SrcTy); in select() local
DAArch64InstrInfo.cpp1197 unsigned NewOpc = convertToNonFlagSettingOpc(CmpInstr); in optimizeCompareInstr() local
1452 unsigned NewOpc = sForm(*MI); in substituteCmpToZero() local
3751 unsigned NewOpc = convertToNonFlagSettingOpc(Root); in getMaddPatterns() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiMemAluCombiner.cpp252 unsigned NewOpc = mergedOpcode(MemInstr->getOpcode(), AluOffset.isImm()); in insertMergedInstruction() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonRDFOpt.cpp224 unsigned OpNum, NewOpc; in rewrite() local
DHexagonGenPredicate.cpp388 unsigned NewOpc = getPredForm(Opc); in convertToPredForm() local
DHexagonConstExtenders.cpp1565 unsigned NewOpc = Ex.Neg ? Hexagon::S4_subi_asl_ri in insertInitializer() local
1617 unsigned NewOpc = ExtOpc == Hexagon::C2_cmpgei ? Hexagon::C2_cmplt in replaceInstrExact() local
1787 unsigned NewOpc = ExtOpc == Hexagon::M2_naccii ? Hexagon::A2_sub in replaceInstrExpr() local
DHexagonCopyToCombine.cpp868 unsigned NewOpc; in emitCombineRR() local
DHexagonInstrInfo.cpp1066 unsigned NewOpc = UseAligned(MI, NeedAlign) ? Hexagon::V6_vL32b_ai in expandPostRAPseudo() local
1082 unsigned NewOpc = UseAligned(MI, NeedAlign) ? Hexagon::V6_vL32b_ai in expandPostRAPseudo() local
1104 unsigned NewOpc = UseAligned(MI, NeedAlign) ? Hexagon::V6_vS32b_ai in expandPostRAPseudo() local
1121 unsigned NewOpc = UseAligned(MI, NeedAlign) ? Hexagon::V6_vS32b_ai in expandPostRAPseudo() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsInstrInfo.cpp594 MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc, in genInstrWithNewOpc()
DMipsBranchExpansion.cpp337 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode()); in replaceBranch() local
DMipsInstructionSelector.cpp407 const unsigned NewOpc = selectLoadStoreOpCode(I, MRI); in select() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp741 int NewOpc; in commuteOpcode() local
2343 unsigned NewOpc = isVGPRCopy ? AMDGPU::V_MOV_B32_e32 : AMDGPU::S_MOV_B32; in FoldImmediate() local
2389 unsigned NewOpc = in FoldImmediate() local
2474 unsigned NewOpc = in FoldImmediate() local
2668 unsigned NewOpc = in convertToThreeAddress() local
2678 unsigned NewOpc = in convertToThreeAddress() local
2701 unsigned NewOpc = IsFMA ? (IsF16 ? AMDGPU::V_FMA_F16 : AMDGPU::V_FMA_F32) in convertToThreeAddress() local
5126 unsigned NewOpc = Opc == AMDGPU::S_ADD_I32 ? in moveScalarAddSub() local

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