1 //===-- PatchableFunction.cpp - Patchable prologues for LLVM -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements edits function bodies in place to support the
10 // "patchable-function" attribute.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "llvm/CodeGen/MachineFunction.h"
15 #include "llvm/CodeGen/MachineFunctionPass.h"
16 #include "llvm/CodeGen/MachineInstrBuilder.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/TargetFrameLowering.h"
19 #include "llvm/CodeGen/TargetInstrInfo.h"
20 #include "llvm/CodeGen/TargetSubtargetInfo.h"
21 #include "llvm/InitializePasses.h"
22
23 using namespace llvm;
24
25 namespace {
26 struct PatchableFunction : public MachineFunctionPass {
27 static char ID; // Pass identification, replacement for typeid
PatchableFunction__anon1e027d490111::PatchableFunction28 PatchableFunction() : MachineFunctionPass(ID) {
29 initializePatchableFunctionPass(*PassRegistry::getPassRegistry());
30 }
31
32 bool runOnMachineFunction(MachineFunction &F) override;
getRequiredProperties__anon1e027d490111::PatchableFunction33 MachineFunctionProperties getRequiredProperties() const override {
34 return MachineFunctionProperties().set(
35 MachineFunctionProperties::Property::NoVRegs);
36 }
37 };
38 }
39
40 /// Returns true if instruction \p MI will not result in actual machine code
41 /// instructions.
doesNotGeneratecode(const MachineInstr & MI)42 static bool doesNotGeneratecode(const MachineInstr &MI) {
43 // TODO: Introduce an MCInstrDesc flag for this
44 switch (MI.getOpcode()) {
45 default: return false;
46 case TargetOpcode::IMPLICIT_DEF:
47 case TargetOpcode::KILL:
48 case TargetOpcode::CFI_INSTRUCTION:
49 case TargetOpcode::EH_LABEL:
50 case TargetOpcode::GC_LABEL:
51 case TargetOpcode::DBG_VALUE:
52 case TargetOpcode::DBG_LABEL:
53 return true;
54 }
55 }
56
runOnMachineFunction(MachineFunction & MF)57 bool PatchableFunction::runOnMachineFunction(MachineFunction &MF) {
58 if (MF.getFunction().hasFnAttribute("patchable-function-entry")) {
59 MachineBasicBlock &FirstMBB = *MF.begin();
60 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
61 if (FirstMBB.empty()) {
62 BuildMI(&FirstMBB, DebugLoc(),
63 TII->get(TargetOpcode::PATCHABLE_FUNCTION_ENTER));
64 } else {
65 MachineInstr &FirstMI = *FirstMBB.begin();
66 BuildMI(FirstMBB, FirstMI, FirstMI.getDebugLoc(),
67 TII->get(TargetOpcode::PATCHABLE_FUNCTION_ENTER));
68 }
69 return true;
70 }
71
72 if (!MF.getFunction().hasFnAttribute("patchable-function"))
73 return false;
74
75 #ifndef NDEBUG
76 Attribute PatchAttr = MF.getFunction().getFnAttribute("patchable-function");
77 StringRef PatchType = PatchAttr.getValueAsString();
78 assert(PatchType == "prologue-short-redirect" && "Only possibility today!");
79 #endif
80
81 auto &FirstMBB = *MF.begin();
82 MachineBasicBlock::iterator FirstActualI = FirstMBB.begin();
83 for (; doesNotGeneratecode(*FirstActualI); ++FirstActualI)
84 assert(FirstActualI != FirstMBB.end());
85
86 auto *TII = MF.getSubtarget().getInstrInfo();
87 auto MIB = BuildMI(FirstMBB, FirstActualI, FirstActualI->getDebugLoc(),
88 TII->get(TargetOpcode::PATCHABLE_OP))
89 .addImm(2)
90 .addImm(FirstActualI->getOpcode());
91
92 for (auto &MO : FirstActualI->operands())
93 MIB.add(MO);
94
95 FirstActualI->eraseFromParent();
96 MF.ensureAlignment(Align(16));
97 return true;
98 }
99
100 char PatchableFunction::ID = 0;
101 char &llvm::PatchableFunctionID = PatchableFunction::ID;
102 INITIALIZE_PASS(PatchableFunction, "patchable-function",
103 "Implement the 'patchable-function' attribute", false, false)
104