1 //===----- PostRAHazardRecognizer.cpp - hazard recognizer -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This runs the hazard recognizer and emits noops when necessary. This
11 /// gives targets a way to run the hazard recognizer without running one of
12 /// the schedulers. Example use cases for this pass would be:
13 ///
14 /// - Targets that need the hazard recognizer to be run at -O0.
15 /// - Targets that want to guarantee that hazards at the beginning of
16 /// scheduling regions are handled correctly. The post-RA scheduler is
17 /// a top-down scheduler, but when there are multiple scheduling regions
18 /// in a basic block, it visits the regions in bottom-up order. This
19 /// makes it impossible for the scheduler to gauranttee it can correctly
20 /// handle hazards at the beginning of scheduling regions.
21 ///
22 /// This pass traverses all the instructions in a program in top-down order.
23 /// In contrast to the instruction scheduling passes, this pass never resets
24 /// the hazard recognizer to ensure it can correctly handles noop hazards at
25 /// the beginning of blocks.
26 //
27 //===----------------------------------------------------------------------===//
28
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/CodeGen/MachineFunctionPass.h"
31 #include "llvm/CodeGen/Passes.h"
32 #include "llvm/CodeGen/ScheduleHazardRecognizer.h"
33 #include "llvm/CodeGen/TargetInstrInfo.h"
34 #include "llvm/CodeGen/TargetSubtargetInfo.h"
35 #include "llvm/InitializePasses.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/raw_ostream.h"
39 using namespace llvm;
40
41 #define DEBUG_TYPE "post-RA-hazard-rec"
42
43 STATISTIC(NumNoops, "Number of noops inserted");
44
45 namespace {
46 class PostRAHazardRecognizer : public MachineFunctionPass {
47
48 public:
49 static char ID;
PostRAHazardRecognizer()50 PostRAHazardRecognizer() : MachineFunctionPass(ID) {}
51
getAnalysisUsage(AnalysisUsage & AU) const52 void getAnalysisUsage(AnalysisUsage &AU) const override {
53 AU.setPreservesCFG();
54 MachineFunctionPass::getAnalysisUsage(AU);
55 }
56
57 bool runOnMachineFunction(MachineFunction &Fn) override;
58
59 };
60 char PostRAHazardRecognizer::ID = 0;
61
62 }
63
64 char &llvm::PostRAHazardRecognizerID = PostRAHazardRecognizer::ID;
65
66 INITIALIZE_PASS(PostRAHazardRecognizer, DEBUG_TYPE,
67 "Post RA hazard recognizer", false, false)
68
runOnMachineFunction(MachineFunction & Fn)69 bool PostRAHazardRecognizer::runOnMachineFunction(MachineFunction &Fn) {
70 const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
71 std::unique_ptr<ScheduleHazardRecognizer> HazardRec(
72 TII->CreateTargetPostRAHazardRecognizer(Fn));
73
74 // Return if the target has not implemented a hazard recognizer.
75 if (!HazardRec.get())
76 return false;
77
78 // Loop over all of the basic blocks
79 for (auto &MBB : Fn) {
80 // We do not call HazardRec->reset() here to make sure we are handling noop
81 // hazards at the start of basic blocks.
82 for (MachineInstr &MI : MBB) {
83 // If we need to emit noops prior to this instruction, then do so.
84 unsigned NumPreNoops = HazardRec->PreEmitNoops(&MI);
85 for (unsigned i = 0; i != NumPreNoops; ++i) {
86 HazardRec->EmitNoop();
87 TII->insertNoop(MBB, MachineBasicBlock::iterator(MI));
88 ++NumNoops;
89 }
90
91 HazardRec->EmitInstruction(&MI);
92 if (HazardRec->atIssueLimit()) {
93 HazardRec->AdvanceCycle();
94 }
95 }
96 }
97 return true;
98 }
99