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Searched defs:RegOp (Results 1 – 25 of 30) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrFoldTables.cpp5515 lookupFoldTableImpl(ArrayRef<X86MemoryFoldTableEntry> Table, unsigned RegOp) { in lookupFoldTableImpl()
5580 llvm::lookupTwoAddrFoldTable(unsigned RegOp) { in lookupTwoAddrFoldTable()
5585 llvm::lookupFoldTable(unsigned RegOp, unsigned OpNum) { in lookupFoldTable()
DX86MCInstLower.cpp351 unsigned RegOp = IsStore ? 0 : 5; in SimplifyShortMoveForm() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/
DLanaiInstPrinter.cpp214 const MCOperand &RegOp) { in printMemoryBaseRegister()
240 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRiOperand() local
255 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRrOperand() local
276 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemSplsOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/
DBPFInstPrinter.cpp67 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRAsmPrinter.cpp96 const MachineOperand &RegOp = MI->getOperand(OpNum); in PrintAsmOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiAsmPrinter.cpp130 unsigned RegOp = OpNo + 1; in PrintAsmOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/AsmParser/
DBPFAsmParser.cpp87 struct RegOp { struct
88 unsigned RegNum;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp230 struct RegOp { struct in __anond97033fd0211::SparcOperand
231 unsigned RegNum;
232 RegisterKind Kind;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/MCTargetDesc/
DAVRMCCodeEmitter.cpp137 auto RegOp = MI.getOperand(OpNo); in encodeMemri() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
DX86Operand.h46 struct RegOp { struct
47 unsigned RegNo;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp1606 unsigned RegOp = CurOp++; in encodeInstruction() local
1619 unsigned RegOp = CurOp++; in encodeInstruction() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/AsmParser/
DSystemZAsmParser.cpp105 struct RegOp { struct in __anon122763890111::SystemZOperand
106 RegisterKind Kind;
107 unsigned Num;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp1388 const MachineOperand *RegOp = nullptr; in isOMod() local
1439 const MachineOperand *RegOp; in tryFoldOMod() local
DAMDGPUMachineCFGStructurizer.cpp1882 MachineOperand RegOp = MachineOperand::CreateReg(Reg, false, false, true); in createIfBlock() local
2341 MachineOperand RegOp = in createIfRegion() local
2400 MachineOperand RegOp = MachineOperand::CreateReg(Reg, false, false, true); in createIfRegion() local
DSIInstrInfo.cpp875 MachineOperand RegOp = Cond[1]; in insertVectorSelect() local
889 MachineOperand RegOp = Cond[1]; in insertVectorSelect() local
1652 MachineOperand &RegOp, in swapRegAndNonRegOperand()
6419 auto &RegOp = MI.getOperand(1 + 2 * I); in getRegSequenceSubReg() local
DGCNHazardRecognizer.cpp126 const MachineOperand *RegOp = TII->getNamedOperand(RegInstr, in getHWReg() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/AsmParser/
DLanaiAsmParser.cpp120 struct RegOp { struct
121 unsigned RegNum;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h496 inline unsigned getRegState(const MachineOperand &RegOp) { in getRegState()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp310 struct RegOp { struct in __anona71ef61d0111::AArch64Operand
311 unsigned RegNum;
312 RegKind Kind;
313 int ElementWidth;
317 RegConstraintEqualityTy EqualityTy;
333 ShiftExtendOp ShiftExtend;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/
DRISCVAsmParser.cpp226 struct RegOp { struct
227 Register RegNum;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp629 MachineOperand &RegOp = I.getOperand(1); in selectSubregisterCopy() local
758 MachineOperand &RegOp = I.getOperand(1); in selectCopy() local
1649 MachineOperand &RegOp = I.getOperand(0); in select() local
4032 MachineOperand &RegOp = I.getOperand(1); in selectBuildVector() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsAsmPrinter.cpp586 unsigned RegOp = OpNum; in PrintAsmOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMAsmPrinter.cpp388 unsigned RegOp = FirstHalf ? OpNum : OpNum + 1; in PrintAsmOperand() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp203 struct RegOp { struct in __anond10a7bc70111::AMDGPUOperand
204 unsigned RegNo;
205 Modifiers Mods;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonConstExtenders.cpp1760 const MachineOperand &RegOp = MI.getOperand(IsAddi ? 1 : 2); in replaceInstrExpr() local

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