Searched defs:SReg (Results 1 – 12 of 12) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | RegisterScavenging.cpp | 560 Register SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister() local 668 Register SReg = RS.scavengeRegisterBackwards(RC, DefMI.getIterator(), in scavengeVReg() local 708 Register SReg = scavengeVReg(MRI, RS, Reg, true); in scavengeFrameVirtualRegsInBlock() local 734 Register SReg = scavengeVReg(MRI, RS, Reg, false); in scavengeFrameVirtualRegsInBlock() local
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D | LivePhysRegs.cpp | 263 for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) { in addLiveIns() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | VirtRegMap.h | 135 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | A15SDOptimizer.cpp | 144 unsigned A15SDOptimizer::getDPRLaneFromSPR(unsigned SReg) { in getDPRLaneFromSPR() 153 unsigned A15SDOptimizer::getPrefSPRLane(unsigned SReg) { in getPrefSPRLane()
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D | ARMBaseInstrInfo.cpp | 4867 unsigned SReg, unsigned &Lane) { in getCorrespondingDRegAndLane()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIInsertSkips.cpp | 382 unsigned SReg = AMDGPU::NoRegister; in optimizeVccBranch() local
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D | SIShrinkInstructions.cpp | 746 Register SReg = Src2->getReg(); in runOnMachineFunction() local
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D | SIInstrInfo.cpp | 834 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local 847 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local 861 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local 877 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local 891 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local 903 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local 921 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.cpp | 1126 SReg = MF.getRegInfo().createVirtualRegister(RC); in eliminateFrameIndex() local
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D | PPCISelLowering.cpp | 10880 Register SReg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 4751 unsigned SReg = Inst.getOperand(1).getReg(); in expandRotation() local 4814 unsigned SReg = Inst.getOperand(1).getReg(); in expandRotationImm() local 4876 unsigned SReg = Inst.getOperand(1).getReg(); in expandDRotation() local 4939 unsigned SReg = Inst.getOperand(1).getReg(); in expandDRotationImm() local
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 205 IValueT SReg = EncodedQReg << 2; in mapQRegToSReg() local
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