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1 /*
2  * Mesa 3-D graphics library
3  *
4  * Copyright (C) 1999-2008  Brian Paul   All Rights Reserved.
5  * Copyright (C) 1999-2009  VMware, Inc.  All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the "Software"),
9  * to deal in the Software without restriction, including without limitation
10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11  * and/or sell copies of the Software, and to permit persons to whom the
12  * Software is furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included
15  * in all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23  * OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 
27 #include <stdio.h>
28 #include <assert.h>
29 
30 #include "main/glheader.h"
31 #include "prog_instruction.h"
32 #include "prog_parameter.h"
33 
34 
35 /**
36  * Initialize program instruction fields to defaults.
37  * \param inst  first instruction to initialize
38  * \param count  number of instructions to initialize
39  */
40 void
_mesa_init_instructions(struct prog_instruction * inst,GLuint count)41 _mesa_init_instructions(struct prog_instruction *inst, GLuint count)
42 {
43    GLuint i;
44 
45    memset(inst, 0, count * sizeof(struct prog_instruction));
46 
47    for (i = 0; i < count; i++) {
48       inst[i].SrcReg[0].File = PROGRAM_UNDEFINED;
49       inst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP;
50       inst[i].SrcReg[1].File = PROGRAM_UNDEFINED;
51       inst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP;
52       inst[i].SrcReg[2].File = PROGRAM_UNDEFINED;
53       inst[i].SrcReg[2].Swizzle = SWIZZLE_NOOP;
54 
55       inst[i].DstReg.File = PROGRAM_UNDEFINED;
56       inst[i].DstReg.WriteMask = WRITEMASK_XYZW;
57 
58       inst[i].Saturate = GL_FALSE;
59    }
60 }
61 
62 
63 /**
64  * Copy an array of program instructions.
65  * \param dest  pointer to destination.
66  * \param src  pointer to source.
67  * \param n  number of instructions to copy.
68  * \return pointer to destination.
69  */
70 struct prog_instruction *
_mesa_copy_instructions(struct prog_instruction * dest,const struct prog_instruction * src,GLuint n)71 _mesa_copy_instructions(struct prog_instruction *dest,
72                         const struct prog_instruction *src, GLuint n)
73 {
74    memcpy(dest, src, n * sizeof(struct prog_instruction));
75    return dest;
76 }
77 
78 
79 /**
80  * Basic info about each instruction
81  */
82 struct instruction_info
83 {
84    enum prog_opcode Opcode;
85    const char *Name;
86    GLuint NumSrcRegs;
87    GLuint NumDstRegs;
88 };
89 
90 /**
91  * Instruction info
92  * \note Opcode should equal array index!
93  */
94 static const struct instruction_info InstInfo[MAX_OPCODE] = {
95    { OPCODE_NOP,    "NOP",     0, 0 },
96    { OPCODE_ABS,    "ABS",     1, 1 },
97    { OPCODE_ADD,    "ADD",     2, 1 },
98    { OPCODE_ARL,    "ARL",     1, 1 },
99    { OPCODE_BGNLOOP,"BGNLOOP", 0, 0 },
100    { OPCODE_BGNSUB, "BGNSUB",  0, 0 },
101    { OPCODE_BRK,    "BRK",     0, 0 },
102    { OPCODE_CAL,    "CAL",     0, 0 },
103    { OPCODE_CMP,    "CMP",     3, 1 },
104    { OPCODE_CONT,   "CONT",    0, 0 },
105    { OPCODE_COS,    "COS",     1, 1 },
106    { OPCODE_DDX,    "DDX",     1, 1 },
107    { OPCODE_DDY,    "DDY",     1, 1 },
108    { OPCODE_DP2,    "DP2",     2, 1 },
109    { OPCODE_DP3,    "DP3",     2, 1 },
110    { OPCODE_DP4,    "DP4",     2, 1 },
111    { OPCODE_DPH,    "DPH",     2, 1 },
112    { OPCODE_DST,    "DST",     2, 1 },
113    { OPCODE_ELSE,   "ELSE",    0, 0 },
114    { OPCODE_END,    "END",     0, 0 },
115    { OPCODE_ENDIF,  "ENDIF",   0, 0 },
116    { OPCODE_ENDLOOP,"ENDLOOP", 0, 0 },
117    { OPCODE_ENDSUB, "ENDSUB",  0, 0 },
118    { OPCODE_EX2,    "EX2",     1, 1 },
119    { OPCODE_EXP,    "EXP",     1, 1 },
120    { OPCODE_FLR,    "FLR",     1, 1 },
121    { OPCODE_FRC,    "FRC",     1, 1 },
122    { OPCODE_IF,     "IF",      1, 0 },
123    { OPCODE_KIL,    "KIL",     1, 0 },
124    { OPCODE_LG2,    "LG2",     1, 1 },
125    { OPCODE_LIT,    "LIT",     1, 1 },
126    { OPCODE_LOG,    "LOG",     1, 1 },
127    { OPCODE_LRP,    "LRP",     3, 1 },
128    { OPCODE_MAD,    "MAD",     3, 1 },
129    { OPCODE_MAX,    "MAX",     2, 1 },
130    { OPCODE_MIN,    "MIN",     2, 1 },
131    { OPCODE_MOV,    "MOV",     1, 1 },
132    { OPCODE_MUL,    "MUL",     2, 1 },
133    { OPCODE_NOISE1, "NOISE1",  1, 1 },
134    { OPCODE_NOISE2, "NOISE2",  1, 1 },
135    { OPCODE_NOISE3, "NOISE3",  1, 1 },
136    { OPCODE_NOISE4, "NOISE4",  1, 1 },
137    { OPCODE_POW,    "POW",     2, 1 },
138    { OPCODE_RCP,    "RCP",     1, 1 },
139    { OPCODE_RET,    "RET",     0, 0 },
140    { OPCODE_RSQ,    "RSQ",     1, 1 },
141    { OPCODE_SCS,    "SCS",     1, 1 },
142    { OPCODE_SGE,    "SGE",     2, 1 },
143    { OPCODE_SIN,    "SIN",     1, 1 },
144    { OPCODE_SLT,    "SLT",     2, 1 },
145    { OPCODE_SSG,    "SSG",     1, 1 },
146    { OPCODE_SUB,    "SUB",     2, 1 },
147    { OPCODE_SWZ,    "SWZ",     1, 1 },
148    { OPCODE_TEX,    "TEX",     1, 1 },
149    { OPCODE_TXB,    "TXB",     1, 1 },
150    { OPCODE_TXD,    "TXD",     3, 1 },
151    { OPCODE_TXL,    "TXL",     1, 1 },
152    { OPCODE_TXP,    "TXP",     1, 1 },
153    { OPCODE_TRUNC,  "TRUNC",   1, 1 },
154    { OPCODE_XPD,    "XPD",     2, 1 }
155 };
156 
157 
158 /**
159  * Return the number of src registers for the given instruction/opcode.
160  */
161 GLuint
_mesa_num_inst_src_regs(enum prog_opcode opcode)162 _mesa_num_inst_src_regs(enum prog_opcode opcode)
163 {
164    assert(opcode < MAX_OPCODE);
165    assert(opcode == InstInfo[opcode].Opcode);
166    assert(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
167    return InstInfo[opcode].NumSrcRegs;
168 }
169 
170 
171 /**
172  * Return the number of dst registers for the given instruction/opcode.
173  */
174 GLuint
_mesa_num_inst_dst_regs(enum prog_opcode opcode)175 _mesa_num_inst_dst_regs(enum prog_opcode opcode)
176 {
177    assert(opcode < MAX_OPCODE);
178    assert(opcode == InstInfo[opcode].Opcode);
179    assert(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
180    return InstInfo[opcode].NumDstRegs;
181 }
182 
183 
184 /**
185  * Return string name for given program opcode.
186  */
187 const char *
_mesa_opcode_string(enum prog_opcode opcode)188 _mesa_opcode_string(enum prog_opcode opcode)
189 {
190    if (opcode < MAX_OPCODE)
191       return InstInfo[opcode].Name;
192    else {
193       static char s[20];
194       snprintf(s, sizeof(s), "OP%u", opcode);
195       return s;
196    }
197 }
198 
199