| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerX8632.cpp | 2285 void AssemblerX8632::adc(Type Ty, GPRRegister dst, GPRRegister src) { in adc() function in Ice::X8632::AssemblerX8632
2289 void AssemblerX8632::adc(Type Ty, GPRRegister dst, const AsmAddress &address) { in adc() function in Ice::X8632::AssemblerX8632
2293 void AssemblerX8632::adc(Type Ty, GPRRegister reg, const Immediate &imm) { in adc() function in Ice::X8632::AssemblerX8632
2297 void AssemblerX8632::adc(Type Ty, const AsmAddress &address, GPRRegister reg) { in adc() function in Ice::X8632::AssemblerX8632
2301 void AssemblerX8632::adc(Type Ty, const AsmAddress &address, in adc() function in Ice::X8632::AssemblerX8632
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| D | IceAssemblerX8664.cpp | 2413 void AssemblerX8664::adc(Type Ty, GPRRegister dst, GPRRegister src) { in adc() function in Ice::X8664::AssemblerX8664
2417 void AssemblerX8664::adc(Type Ty, GPRRegister dst, const AsmAddress &address) { in adc() function in Ice::X8664::AssemblerX8664
2421 void AssemblerX8664::adc(Type Ty, GPRRegister reg, const Immediate &imm) { in adc() function in Ice::X8664::AssemblerX8664
2425 void AssemblerX8664::adc(Type Ty, const AsmAddress &address, GPRRegister reg) { in adc() function in Ice::X8664::AssemblerX8664
2429 void AssemblerX8664::adc(Type Ty, const AsmAddress &address, in adc() function in Ice::X8664::AssemblerX8664
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| D | IceAssemblerARM32.cpp | 1317 void AssemblerARM32::adc(const Operand *OpRd, const Operand *OpRn, in adc() function in Ice::ARM32::AssemblerARM32
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| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| D | code-generator-ia32.cc | 1171 __ adc(i.OutputRegister(1), Operand(i.InputRegister(3))); in AssembleArchInstruction() local
3667 __ adc(i.InputRegister(1), 0); in AssembleArchInstruction() local
3671 __ adc(i.InputRegister(1), edx); in AssembleArchInstruction() local
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| D | code-generator-arm.cc | 1228 __ adc(i.OutputRegister(1), i.InputRegister(1), in AssembleArchInstruction() local
1538 __ adc(i.OutputRegister(), i.OutputRegister(), Operand::Zero()); in AssembleArchInstruction() local
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| /third_party/node/deps/v8/src/codegen/ia32/ |
| D | assembler-ia32.cc | 848 void Assembler::adc(Register dst, int32_t imm32) { in adc() function in v8::internal::Assembler
853 void Assembler::adc(Register dst, Operand src) { in adc() function in v8::internal::Assembler
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| D | assembler-ia32.h | 570 void adc(Register dst, Register src) { adc(dst, Operand(src)); } in adc() function
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| /third_party/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 57 __ adc(w3, w4, w5); in GenerateTestSequenceBase() local
58 __ adc(x6, x7, x8); in GenerateTestSequenceBase() local
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| /third_party/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 1891 void adc(Register rd, Register rn, const Operand& operand) { in adc() function
1894 void adc(Condition cond, Register rd, Register rn, const Operand& operand) { in adc() function
1897 void adc(EncodingSize size, in adc() function
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| D | assembler-aarch32.cc | 1923 void Assembler::adc(Condition cond, in adc() function in vixl::aarch32::Assembler
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| D | disasm-aarch32.cc | 1127 void Disassembler::adc(Condition cond, in adc() function in vixl::aarch32::Disassembler
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | assembler-arm64.cc | 878 void Assembler::adc(const Register& rd, const Register& rn, in adc() function in v8::internal::Assembler
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| /third_party/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 521 void Assembler::adc(const Register& rd, in adc() function in vixl::aarch64::Assembler
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| /third_party/node/deps/v8/src/codegen/arm/ |
| D | assembler-arm.cc | 1581 void Assembler::adc(Register dst, Register src1, const Operand& src2, SBit s, in adc() function in v8::internal::Assembler
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