1 /*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #ifndef FD6_CONTEXT_H_
29 #define FD6_CONTEXT_H_
30
31 #include "util/u_upload_mgr.h"
32
33 #include "freedreno_context.h"
34 #include "freedreno_resource.h"
35
36 #include "ir3/ir3_shader.h"
37
38 #include "a6xx.xml.h"
39
40 struct fd6_lrz_state {
41 bool enable : 1;
42 bool write : 1;
43 bool test : 1;
44 enum fd_lrz_direction direction : 2;
45
46 /* this comes from the fs program state, rather than zsa: */
47 enum a6xx_ztest_mode z_mode : 2;
48 };
49
50 struct fd6_context {
51 struct fd_context base;
52
53 /* Two buffers related to hw binning / visibility stream (VSC).
54 * Compared to previous generations
55 * (1) we cannot specify individual buffers per VSC, instead
56 * just a pitch and base address
57 * (2) there is a second smaller buffer.. we also stash
58 * VSC_BIN_SIZE at end of 2nd buffer.
59 */
60 struct fd_bo *vsc_draw_strm, *vsc_prim_strm;
61
62 unsigned vsc_draw_strm_pitch, vsc_prim_strm_pitch;
63
64 /* The 'control' mem BO is used for various housekeeping
65 * functions. See 'struct fd6_control'
66 */
67 struct fd_bo *control_mem;
68 uint32_t seqno;
69
70 struct u_upload_mgr *border_color_uploader;
71 struct pipe_resource *border_color_buf;
72
73 /* pre-backed stateobj for stream-out disable: */
74 struct fd_ringbuffer *streamout_disable_stateobj;
75
76 /* storage for ctx->last.key: */
77 struct ir3_shader_key last_key;
78
79 /* Is there current VS driver-param state set? */
80 bool has_dp_state;
81
82 /* number of active samples-passed queries: */
83 int samples_passed_queries;
84
85 /* cached stateobjs to avoid hashtable lookup when not dirty: */
86 const struct fd6_program_state *prog;
87
88 uint16_t tex_seqno;
89 struct hash_table *tex_cache;
90
91 struct {
92 /* previous binning/draw lrz state, which is a function of multiple
93 * gallium stateobjs, but doesn't necessarily change as frequently:
94 */
95 struct fd6_lrz_state lrz[2];
96 } last;
97 };
98
99 static inline struct fd6_context *
fd6_context(struct fd_context * ctx)100 fd6_context(struct fd_context *ctx)
101 {
102 return (struct fd6_context *)ctx;
103 }
104
105 struct pipe_context *fd6_context_create(struct pipe_screen *pscreen, void *priv,
106 unsigned flags);
107
108 /* This struct defines the layout of the fd6_context::control buffer: */
109 struct fd6_control {
110 uint32_t seqno; /* seqno for async CP_EVENT_WRITE, etc */
111 uint32_t _pad0;
112 volatile uint32_t vsc_overflow;
113 uint32_t _pad1[5];
114
115 /* scratch space for VPC_SO[i].FLUSH_BASE_LO/HI, start on 32 byte boundary. */
116 struct {
117 uint32_t offset;
118 uint32_t pad[7];
119 } flush_base[4];
120 };
121
122 #define control_ptr(fd6_ctx, member) \
123 (fd6_ctx)->control_mem, offsetof(struct fd6_control, member), 0, 0
124
125 static inline void
emit_marker6(struct fd_ringbuffer * ring,int scratch_idx)126 emit_marker6(struct fd_ringbuffer *ring, int scratch_idx)
127 {
128 extern int32_t marker_cnt;
129 unsigned reg = REG_A6XX_CP_SCRATCH_REG(scratch_idx);
130 if (__EMIT_MARKER) {
131 OUT_WFI5(ring);
132 OUT_PKT4(ring, reg, 1);
133 OUT_RING(ring, p_atomic_inc_return(&marker_cnt));
134 }
135 }
136
137 struct fd6_vertex_stateobj {
138 struct fd_vertex_stateobj base;
139 struct fd_ringbuffer *stateobj;
140 };
141
142 static inline struct fd6_vertex_stateobj *
fd6_vertex_stateobj(void * p)143 fd6_vertex_stateobj(void *p)
144 {
145 return (struct fd6_vertex_stateobj *)p;
146 }
147
148 #endif /* FD6_CONTEXT_H_ */
149