Searched defs:fcvtl (Results 1 – 7 of 7) sorted by relevance
/third_party/skia/src/core/ |
D | SkVM.h | 317 fcvtl, // f16 in low half -> f32 variable
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D | SkVM.cpp | 2377 void Assembler::fcvtl(V d, V n) { this->op(0b0'0'0'01110'0'0'10000'10111'10, n,d); } in fcvtl() function in skvm::Assembler
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/third_party/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 2571 __ fcvtl(v8.V2D(), v25.V2S()); in GenerateTestSequenceNEONFP() local 2572 __ fcvtl(v27.V4S(), v14.V4H()); in GenerateTestSequenceNEONFP() local
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/third_party/node/deps/v8/src/codegen/arm64/ |
D | assembler-arm64.cc | 2750 void Assembler::fcvtl(const VRegister& vd, const VRegister& vn) { in fcvtl() function in v8::internal::Assembler
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/third_party/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 3040 void Assembler::fcvtl(const VRegister& vd, const VRegister& vn) { in fcvtl() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 5948 LogicVRegister Simulator::fcvtl(VectorFormat vform, in fcvtl() function in vixl::aarch64::Simulator
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/third_party/node/deps/v8/src/execution/arm64/ |
D | simulator-logic-arm64.cc | 3796 LogicVRegister Simulator::fcvtl(VectorFormat vform, LogicVRegister dst, in fcvtl() function in v8::internal::Simulator
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