| /third_party/vixl/src/aarch64/ |
| D | cpu-features-auditor-aarch64.cc | 115 void CPUFeaturesAuditor::LoadStoreHelper(const Instruction* instr) { in LoadStoreHelper()
138 void CPUFeaturesAuditor::LoadStorePairHelper(const Instruction* instr) { in LoadStorePairHelper()
158 void CPUFeaturesAuditor::VisitAddSubExtended(const Instruction* instr) { in VisitAddSubExtended()
163 void CPUFeaturesAuditor::VisitAddSubImmediate(const Instruction* instr) { in VisitAddSubImmediate()
168 void CPUFeaturesAuditor::VisitAddSubShifted(const Instruction* instr) { in VisitAddSubShifted()
173 void CPUFeaturesAuditor::VisitAddSubWithCarry(const Instruction* instr) { in VisitAddSubWithCarry()
178 void CPUFeaturesAuditor::VisitRotateRightIntoFlags(const Instruction* instr) { in VisitRotateRightIntoFlags()
187 void CPUFeaturesAuditor::VisitEvaluateIntoFlags(const Instruction* instr) { in VisitEvaluateIntoFlags()
197 void CPUFeaturesAuditor::VisitAtomicMemory(const Instruction* instr) { in VisitAtomicMemory()
213 void CPUFeaturesAuditor::VisitBitfield(const Instruction* instr) { in VisitBitfield()
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| D | disasm-aarch64.cc | 679 void Disassembler::VisitAddSubImmediate(const Instruction *instr) { in Disassembler()
728 void Disassembler::VisitAddSubShifted(const Instruction *instr) { in Disassembler()
778 void Disassembler::VisitAddSubExtended(const Instruction *instr) { in Disassembler()
821 void Disassembler::VisitAddSubWithCarry(const Instruction *instr) { in Disassembler()
861 void Disassembler::VisitRotateRightIntoFlags(const Instruction *instr) { in Disassembler()
878 void Disassembler::VisitEvaluateIntoFlags(const Instruction *instr) { in Disassembler()
899 void Disassembler::VisitLogicalImmediate(const Instruction *instr) { in Disassembler()
975 void Disassembler::VisitLogicalShifted(const Instruction *instr) { in Disassembler()
1038 void Disassembler::VisitConditionalCompareRegister(const Instruction *instr) { in Disassembler()
1058 void Disassembler::VisitConditionalCompareImmediate(const Instruction *instr) { in Disassembler()
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| D | simulator-aarch64.cc | 1992 void Simulator::Visit(Metadata* metadata, const Instruction* instr) { in Simulator()
2004 void Simulator::Simulate_PdT_PgZ_ZnT_ZmT(const Instruction* instr) { in Simulator()
2025 void Simulator::Simulate_PdT_Xn_Xm(const Instruction* instr) { in Simulator()
2056 void Simulator::Simulate_ZdB_Zn1B_Zn2B_imm(const Instruction* instr) { in Simulator()
2070 void Simulator::Simulate_ZdB_ZnB_ZmB(const Instruction* instr) { in Simulator()
2096 void Simulator::SimulateSVEMulIndex(const Instruction* instr) { in Simulator()
2115 void Simulator::SimulateSVEMlaMlsIndex(const Instruction* instr) { in Simulator()
2141 void Simulator::SimulateSVESaturatingMulHighIndex(const Instruction* instr) { in Simulator()
2171 void Simulator::SimulateSVESaturatingIntMulLongIdx(const Instruction* instr) { in Simulator()
2254 void Simulator::Simulate_ZdH_PgM_ZnS(const Instruction* instr) { in Simulator()
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_optimizer.cpp | 74 void visit(ExportInstr *instr) override {(void)instr;}; in visit()
78 void visit(ControlFlowInstr *instr) override {(void)instr;}; in visit()
79 void visit(IfInstr *instr) override {(void)instr;}; in visit()
80 void visit(ScratchIOInstr *instr) override {(void)instr;}; in visit()
81 void visit(StreamOutInstr *instr) override {(void)instr;}; in visit()
82 void visit(MemRingOutInstr *instr) override {(void)instr;}; in visit()
83 void visit(EmitVertexInstr *instr) override {(void)instr;}; in visit()
84 void visit(GDSInstr *instr) override {(void)instr;}; in visit()
85 void visit(WriteTFInstr *instr) override {(void)instr;}; in visit()
86 void visit(LDSAtomicInstr *instr) override {(void)instr;}; in visit()
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| D | sfn_peephole.cpp | 36 void visit(TexInstr *instr) override {(void)instr;}; in visit()
37 void visit(ExportInstr *instr) override {(void)instr;} in visit()
38 void visit(FetchInstr *instr) override {(void)instr;} in visit()
40 void visit(ControlFlowInstr *instr) override {(void)instr;} in visit()
42 void visit(ScratchIOInstr *instr) override {(void)instr;} in visit()
43 void visit(StreamOutInstr *instr) override {(void)instr;} in visit()
44 void visit(MemRingOutInstr *instr) override {(void)instr;} in visit()
45 void visit(EmitVertexInstr *instr) override {(void)instr;} in visit()
46 void visit(GDSInstr *instr) override {(void)instr;}; in visit()
47 void visit(WriteTFInstr *instr) override {(void)instr;}; in visit()
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| D | sfn_instr_alu.h | 203 void visit(TexInstr *instr) override {(void)instr;} in visit()
204 void visit(ExportInstr *instr) override {(void)instr;} in visit()
205 void visit(FetchInstr *instr) override {(void)instr;} in visit()
206 void visit(ControlFlowInstr *instr) override {(void)instr;} in visit()
207 void visit(ScratchIOInstr *instr) override {(void)instr;} in visit()
208 void visit(StreamOutInstr *instr) override {(void)instr;} in visit()
209 void visit(MemRingOutInstr *instr) override {(void)instr;} in visit()
210 void visit(EmitVertexInstr *instr) override {(void)instr;} in visit()
211 void visit(GDSInstr *instr) override {(void)instr;}; in visit()
212 void visit(WriteTFInstr *instr) override {(void)instr;}; in visit()
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| D | sfn_instr.cpp | 152 void Instr::add_required_instr(Instr *instr) in add_required_instr()
290 void Block::push_back(PInst instr) in push_back()
322 bool Block::try_reserve_kcache(const AluInstr& instr) in try_reserve_kcache()
475 void visit(const AluInstr& instr) override { in visit()
479 void visit(const AluGroup& instr) override { in visit()
483 void visit(const TexInstr& instr) override { in visit()
487 void visit(const ExportInstr& instr) override { in visit()
491 void visit(const FetchInstr& instr) override { in visit()
495 void visit(const Block& instr) override { in visit()
499 void visit(const ControlFlowInstr& instr) override { in visit()
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| D | sfn_liverangeevaluator.cpp | 59 void visit(EmitVertexInstr *instr) override {(void)instr;} in visit()
229 void LiveRangeInstrVisitor::visit(AluInstr *instr) in visit()
250 void LiveRangeInstrVisitor::visit(TexInstr *instr) in visit()
263 void LiveRangeInstrVisitor::visit(ExportInstr *instr) in visit()
270 void LiveRangeInstrVisitor::visit(FetchInstr *instr) in visit()
279 void LiveRangeInstrVisitor::visit(Block *instr) in visit()
290 void LiveRangeInstrVisitor::visit(ScratchIOInstr *instr) in visit()
307 void LiveRangeInstrVisitor::visit(StreamOutInstr *instr) in visit()
314 void LiveRangeInstrVisitor::visit(MemRingOutInstr *instr) in visit()
325 void LiveRangeInstrVisitor::visit(ControlFlowInstr *instr) in visit()
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| D | sfn_shader.h | 356 void visit(AluInstr *instr) override {(void) instr;} in visit()
357 void visit(AluGroup *instr) override {(void) instr;} in visit()
358 void visit(TexInstr *instr) override {(void) instr;} in visit()
359 void visit(ExportInstr *instr) override {(void) instr;} in visit()
360 void visit(FetchInstr *instr) override {(void) instr;} in visit()
361 void visit(Block *instr) override {(void) instr;} in visit()
362 void visit(ControlFlowInstr *instr) override {(void) instr;} in visit()
363 void visit(IfInstr *instr) override {(void) instr;} in visit()
364 void visit(StreamOutInstr *instr) override {(void) instr;} in visit()
365 void visit(MemRingOutInstr *instr) override {(void) instr;} in visit()
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| /third_party/node/deps/v8/src/diagnostics/riscv64/ |
| D | disasm-riscv64.cc | 192 void Decoder::PrintRs1(Instruction* instr) { in PrintRs1()
197 void Decoder::PrintRs2(Instruction* instr) { in PrintRs2()
202 void Decoder::PrintRd(Instruction* instr) { in PrintRd()
207 void Decoder::PrintUimm(Instruction* instr) { in PrintUimm()
212 void Decoder::PrintVs1(Instruction* instr) { in PrintVs1()
217 void Decoder::PrintVs2(Instruction* instr) { in PrintVs2()
222 void Decoder::PrintVd(Instruction* instr) { in PrintVd()
232 void Decoder::PrintFRs1(Instruction* instr) { in PrintFRs1()
237 void Decoder::PrintFRs2(Instruction* instr) { in PrintFRs2()
242 void Decoder::PrintFRs3(Instruction* instr) { in PrintFRs3()
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| /third_party/node/deps/v8/src/diagnostics/mips64/ |
| D | disasm-mips64.cc | 194 void Decoder::PrintRs(Instruction* instr) { in PrintRs()
199 void Decoder::PrintRt(Instruction* instr) { in PrintRt()
204 void Decoder::PrintRd(Instruction* instr) { in PrintRd()
239 void Decoder::PrintFs(Instruction* instr) { in PrintFs()
244 void Decoder::PrintFt(Instruction* instr) { in PrintFt()
249 void Decoder::PrintFd(Instruction* instr) { in PrintFd()
255 void Decoder::PrintSa(Instruction* instr) { in PrintSa()
261 void Decoder::PrintLsaSa(Instruction* instr) { in PrintLsaSa()
267 void Decoder::PrintSd(Instruction* instr) { in PrintSd()
273 void Decoder::PrintSs1(Instruction* instr) { in PrintSs1()
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| /third_party/node/deps/v8/src/diagnostics/mips/ |
| D | disasm-mips.cc | 182 void Decoder::PrintRs(Instruction* instr) { in PrintRs()
187 void Decoder::PrintRt(Instruction* instr) { in PrintRt()
192 void Decoder::PrintRd(Instruction* instr) { in PrintRd()
227 void Decoder::PrintFs(Instruction* instr) { in PrintFs()
232 void Decoder::PrintFt(Instruction* instr) { in PrintFt()
237 void Decoder::PrintFd(Instruction* instr) { in PrintFd()
243 void Decoder::PrintSa(Instruction* instr) { in PrintSa()
249 void Decoder::PrintLsaSa(Instruction* instr) { in PrintLsaSa()
255 void Decoder::PrintSd(Instruction* instr) { in PrintSd()
261 void Decoder::PrintSs1(Instruction* instr) { in PrintSs1()
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| /third_party/node/deps/v8/src/diagnostics/loong64/ |
| D | disasm-loong64.cc | 135 void Decoder::PrintRj(Instruction* instr) { in PrintRj()
140 void Decoder::PrintRk(Instruction* instr) { in PrintRk()
145 void Decoder::PrintRd(Instruction* instr) { in PrintRd()
155 void Decoder::PrintFj(Instruction* instr) { in PrintFj()
160 void Decoder::PrintFk(Instruction* instr) { in PrintFk()
165 void Decoder::PrintFd(Instruction* instr) { in PrintFd()
170 void Decoder::PrintFa(Instruction* instr) { in PrintFa()
176 void Decoder::PrintSa2(Instruction* instr) { in PrintSa2()
185 void Decoder::PrintSa3(Instruction* instr) { in PrintSa3()
190 void Decoder::PrintUi5(Instruction* instr) { in PrintUi5()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | decoder-arm64-inl.h | 17 void Decoder<V>::Decode(Instruction* instr) { in Decode()
111 void Decoder<V>::DecodePCRelAddressing(Instruction* instr) { in DecodePCRelAddressing()
120 void Decoder<V>::DecodeBranchSystemException(Instruction* instr) { in DecodeBranchSystemException()
210 void Decoder<V>::DecodeLoadStore(Instruction* instr) { in DecodeLoadStore()
337 void Decoder<V>::DecodeLogical(Instruction* instr) { in DecodeLogical()
356 void Decoder<V>::DecodeBitfieldExtract(Instruction* instr) { in DecodeBitfieldExtract()
381 void Decoder<V>::DecodeAddSubImmediate(Instruction* instr) { in DecodeAddSubImmediate()
391 void Decoder<V>::DecodeDataProcessing(Instruction* instr) { in DecodeDataProcessing()
504 void Decoder<V>::DecodeFP(Instruction* instr) { in DecodeFP()
628 void Decoder<V>::DecodeNEONLoadStore(Instruction* instr) { in DecodeNEONLoadStore()
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| /third_party/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_disasm.c | 39 struct instr { struct
41 uint32_t opc : 6;
42 uint32_t cond : 5;
43 uint32_t sat : 1;
44 uint32_t dst_use : 1;
45 uint32_t dst_amode : 3;
46 uint32_t dst_reg : 7;
47 uint32_t dst_comps : 4;
48 uint32_t tex_id : 5;
51 uint32_t tex_amode : 3;
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| /third_party/node/deps/v8/src/diagnostics/arm64/ |
| D | disasm-arm64.cc | 48 void DisassemblingDecoder::VisitAddSubImmediate(Instruction* instr) { in VisitAddSubImmediate()
96 void DisassemblingDecoder::VisitAddSubShifted(Instruction* instr) { in VisitAddSubShifted()
145 void DisassemblingDecoder::VisitAddSubExtended(Instruction* instr) { in VisitAddSubExtended()
187 void DisassemblingDecoder::VisitAddSubWithCarry(Instruction* instr) { in VisitAddSubWithCarry()
226 void DisassemblingDecoder::VisitLogicalImmediate(Instruction* instr) { in VisitLogicalImmediate()
300 void DisassemblingDecoder::VisitLogicalShifted(Instruction* instr) { in VisitLogicalShifted()
361 void DisassemblingDecoder::VisitConditionalCompareRegister(Instruction* instr) { in VisitConditionalCompareRegister()
381 Instruction* instr) { in VisitConditionalCompareImmediate()
400 void DisassemblingDecoder::VisitConditionalSelect(Instruction* instr) { in VisitConditionalSelect()
455 void DisassemblingDecoder::VisitBitfield(Instruction* instr) { in VisitBitfield()
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| /third_party/mesa3d/src/gallium/drivers/lima/ir/gp/ |
| D | instr.c | 33 gpir_instr *instr = rzalloc(block, gpir_instr); in gpir_instr_create() local
52 static gpir_node *gpir_instr_get_the_other_acc_node(gpir_instr *instr, int slot) in gpir_instr_get_the_other_acc_node()
62 static bool gpir_instr_check_acc_same_op(gpir_instr *instr, gpir_node *node, int slot) in gpir_instr_check_acc_same_op()
75 static int gpir_instr_get_consume_slot(gpir_instr *instr, gpir_node *node) in gpir_instr_get_consume_slot()
90 static bool gpir_instr_insert_alu_check(gpir_instr *instr, gpir_node *node) in gpir_instr_insert_alu_check()
159 static void gpir_instr_remove_alu(gpir_instr *instr, gpir_node *node) in gpir_instr_remove_alu()
184 static bool gpir_instr_insert_reg0_check(gpir_instr *instr, gpir_node *node) in gpir_instr_insert_reg0_check()
208 static void gpir_instr_remove_reg0(gpir_instr *instr, gpir_node *node) in gpir_instr_remove_reg0()
215 static bool gpir_instr_insert_reg1_check(gpir_instr *instr, gpir_node *node) in gpir_instr_insert_reg1_check()
234 static void gpir_instr_remove_reg1(gpir_instr *instr, gpir_node *node) in gpir_instr_remove_reg1()
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| D | codegen.c | 86 static void gpir_codegen_mul0_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_mul0_slot()
146 static void gpir_codegen_mul1_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_mul1_slot()
198 static void gpir_codegen_add0_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_add0_slot()
283 static void gpir_codegen_add1_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_add1_slot()
368 static void gpir_codegen_complex_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_complex_slot()
413 static void gpir_codegen_pass_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_pass_slot()
458 static void gpir_codegen_reg0_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_reg0_slot()
467 static void gpir_codegen_reg1_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_reg1_slot()
475 static void gpir_codegen_mem_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_mem_slot()
502 static void gpir_codegen_store_slot(gpir_codegen_instr *code, gpir_instr *instr) in gpir_codegen_store_slot()
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| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_search_helpers.h | 36 is_pos_power_of_two(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_pos_power_of_two()
68 is_neg_power_of_two(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_neg_power_of_two()
97 is_bitcount2(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_bitcount2()
142 is_zero_to_one(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_zero_to_one()
174 is_gt_0_and_lt_1(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_gt_0_and_lt_1()
200 is_not_const_zero(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_not_const_zero()
230 is_ult_0xfffc07fc(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_ult_0xfffc07fc()
251 is_first_5_bits_uge_2(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_first_5_bits_uge_2()
271 is_not_const(UNUSED struct hash_table *ht, const nir_alu_instr *instr, in is_not_const()
279 is_not_fmul(struct hash_table *ht, const nir_alu_instr *instr, unsigned src, in is_not_fmul()
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| D | nir_group_loads.c | 54 is_memory_load(nir_instr *instr) in is_memory_load()
99 is_grouped_load(nir_instr *instr) in is_grouped_load()
112 can_move(nir_instr *instr, uint8_t current_indirection_level) in can_move()
135 get_uniform_inst_resource(nir_instr *instr) in get_uniform_inst_resource()
183 for (nir_instr *instr = exec_node_data_backward(nir_instr, in group_loads() local
224 for (nir_instr *instr = exec_node_data_forward(nir_instr, in group_loads() local
247 is_pseudo_inst(nir_instr *instr) in is_pseudo_inst()
298 is_barrier(nir_instr *instr) in is_barrier()
330 nir_instr *instr = src->ssa->parent_instr; in gather_indirections() local
347 get_num_indirections(nir_instr *instr) in get_num_indirections()
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| /third_party/mesa3d/src/imagination/rogue/ |
| D | rogue_instr.c | 81 struct rogue_instr *instr; in rogue_instr_create() local
113 bool rogue_instr_set_flag(struct rogue_instr *instr, enum rogue_instr_flag flag) in rogue_instr_set_flag()
128 bool rogue_instr_set_operand_imm(struct rogue_instr *instr, in rogue_instr_set_operand_imm()
148 bool rogue_instr_set_operand_drc(struct rogue_instr *instr, in rogue_instr_set_operand_drc()
169 bool rogue_instr_set_operand_reg(struct rogue_instr *instr, in rogue_instr_set_operand_reg()
191 bool rogue_instr_set_operand_vreg(struct rogue_instr *instr, in rogue_instr_set_operand_vreg()
214 bool rogue_instr_set_operand_vreg_vec(struct rogue_instr *instr, in rogue_instr_set_operand_vreg_vec()
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| /third_party/mesa3d/src/broadcom/qpu/ |
| D | qpu_disasm.c | 60 const struct v3d_qpu_instr *instr, uint8_t mux) in v3d_qpu_disasm_raddr()
102 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_add()
139 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_mul()
182 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_sig_addr()
202 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_sig()
260 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_alu()
269 const struct v3d_qpu_instr *instr) in v3d_qpu_disasm_branch()
318 const struct v3d_qpu_instr *instr) in v3d_qpu_decode()
347 struct v3d_qpu_instr instr; in v3d_qpu_disasm() local
356 const struct v3d_qpu_instr *instr) in v3d_qpu_dump()
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| /third_party/node/deps/v8/src/diagnostics/arm/ |
| D | disasm-arm.cc | 167 void Decoder::PrintCondition(Instruction* instr) { in PrintCondition()
194 void Decoder::PrintShiftRm(Instruction* instr) { in PrintShiftRm()
227 void Decoder::PrintShiftImm(Instruction* instr) { in PrintShiftImm()
235 void Decoder::PrintShiftSat(Instruction* instr) { in PrintShiftSat()
245 void Decoder::PrintPU(Instruction* instr) { in PrintPU()
294 int Decoder::FormatRegister(Instruction* instr, const char* format) { in FormatRegister()
341 int Decoder::FormatVFPRegister(Instruction* instr, const char* format, in FormatVFPRegister()
381 int Decoder::FormatVFPinstruction(Instruction* instr, const char* format) { in FormatVFPinstruction()
421 void Decoder::PrintMovwMovt(Instruction* instr) { in PrintMovwMovt()
434 int Decoder::FormatOption(Instruction* instr, const char* format) { in FormatOption()
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| /third_party/mesa3d/src/freedreno/isa/ |
| D | encode.c | 43 struct ir3_instruction *instr; member
52 extract_SRC1_R(struct ir3_instruction *instr) in extract_SRC1_R()
62 extract_SRC2_R(struct ir3_instruction *instr) in extract_SRC2_R()
75 __instruction_case(struct encode_state *s, struct ir3_instruction *instr) in __instruction_case()
169 extract_cat5_SRC(struct ir3_instruction *instr, unsigned n) in extract_cat5_SRC()
180 extract_cat5_FULL(struct ir3_instruction *instr) in extract_cat5_FULL()
190 extract_cat5_DESC_MODE(struct ir3_instruction *instr) in extract_cat5_DESC_MODE()
224 extract_cat6_DESC_MODE(struct ir3_instruction *instr) in extract_cat6_DESC_MODE()
244 extract_cat6_SRC(struct ir3_instruction *instr, unsigned n) in extract_cat6_SRC()
317 __stc_dst_case(struct encode_state *s, struct ir3_instruction *instr) in __stc_dst_case()
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_dce.c | 37 mark_array_use(struct ir3_instruction *instr, struct ir3_register *reg) in mark_array_use()
47 instr_dce(struct ir3_instruction *instr, bool falsedep) in instr_dce()
171 struct ir3_instruction *instr = ir->a0_users[i]; in find_and_remove_unused() local
177 struct ir3_instruction *instr = ir->a1_users[i]; in find_and_remove_unused() local
183 struct ir3_instruction *instr = ir->predicates[i]; in find_and_remove_unused() local
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