/third_party/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1079 __ ld4(v3.V16B(), v4.V16B(), v5.V16B(), v6.V16B(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1080 __ ld4(v2.V16B(), in GenerateTestSequenceNEON() local 1085 __ ld4(v5.V16B(), in GenerateTestSequenceNEON() local 1090 __ ld4(v18.V2D(), v19.V2D(), v20.V2D(), v21.V2D(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1091 __ ld4(v4.V2D(), v5.V2D(), v6.V2D(), v7.V2D(), MemOperand(x1, x2, PostIndex)); in GenerateTestSequenceNEON() local 1092 __ ld4(v29.V2D(), in GenerateTestSequenceNEON() local 1097 __ ld4(v27.V2S(), v28.V2S(), v29.V2S(), v30.V2S(), MemOperand(x0)); in GenerateTestSequenceNEON() local 1098 __ ld4(v24.V2S(), in GenerateTestSequenceNEON() local 1103 __ ld4(v4.V2S(), v5.V2S(), v6.V2S(), v7.V2S(), MemOperand(x1, 32, PostIndex)); in GenerateTestSequenceNEON() local 1104 __ ld4(v16.V4H(), v17.V4H(), v18.V4H(), v19.V4H(), MemOperand(x0)); in GenerateTestSequenceNEON() local [all …]
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/third_party/node/deps/v8/src/codegen/arm64/ |
D | assembler-arm64.cc | 2425 void Assembler::ld4(const VRegister& vt, const VRegister& vt2, in ld4() function in v8::internal::Assembler 2436 void Assembler::ld4(const VRegister& vt, const VRegister& vt2, in ld4() function in v8::internal::Assembler
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/third_party/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 2164 void Assembler::ld4(const VRegister& vt, in ld4() function in vixl::aarch64::Assembler 2177 void Assembler::ld4(const VRegister& vt, in ld4() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 310 void Simulator::ld4(VectorFormat vform, in ld4() function in vixl::aarch64::Simulator 337 void Simulator::ld4(VectorFormat vform, in ld4() function in vixl::aarch64::Simulator
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/third_party/node/deps/v8/src/execution/arm64/ |
D | simulator-logic-arm64.cc | 445 void Simulator::ld4(VectorFormat vform, LogicVRegister dst1, in ld4() function in v8::internal::Simulator 468 void Simulator::ld4(VectorFormat vform, LogicVRegister dst1, in ld4() function in v8::internal::Simulator
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