| /third_party/node/deps/v8/src/regexp/arm/ |
| D | regexp-macro-assembler-arm.cc | 270 __ ldrb(r3, MemOperand(r0, char_size(), PostIndex)); in CheckNotBackReferenceIgnoreCase() local
271 __ ldrb(r4, MemOperand(r2, char_size(), PostIndex)); in CheckNotBackReferenceIgnoreCase() local
398 __ ldrb(r3, MemOperand(r0, char_size(), PostIndex)); in CheckNotBackReference() local
399 __ ldrb(r4, MemOperand(r2, char_size(), PostIndex)); in CheckNotBackReference() local
527 __ ldrb(r0, MemOperand(r0, r1)); in CheckBitInTable() local
617 __ ldrb(r0, MemOperand(r0, current_character())); in CheckSpecialCharacterClass() local
631 __ ldrb(r0, MemOperand(r0, current_character())); in CheckSpecialCharacterClass() local
1323 __ ldrb(current_character(), MemOperand(end_of_input_address(), offset)); in LoadCurrentCharacterUnchecked() local
|
| /third_party/node/deps/v8/src/builtins/arm/ |
| D | builtins-arm.cc | 986 __ ldrb(bytecode, MemOperand(bytecode_array, bytecode_offset)); in AdvanceBytecodeOffsetOrReturn() local
1024 __ ldrb(scratch1, MemOperand(bytecode_size_table, bytecode)); in AdvanceBytecodeOffsetOrReturn() local
1358 __ ldrb(r4, MemOperand(kInterpreterBytecodeArrayRegister, in Generate_InterpreterEntryTrampoline() local
1378 __ ldrb(r1, MemOperand(kInterpreterBytecodeArrayRegister, in Generate_InterpreterEntryTrampoline() local
1664 __ ldrb(scratch, MemOperand(kInterpreterBytecodeArrayRegister, in Generate_InterpreterEnterBytecode() local
1687 __ ldrb(r1, MemOperand(kInterpreterBytecodeArrayRegister, in Generate_InterpreterEnterAtNextBytecode() local
2157 __ ldrb(scratch, FieldMemOperand(scratch, Map::kBitFieldOffset)); in Generate_CallOrConstructForwardVarargs() local
2440 __ ldrb(flags, FieldMemOperand(map, Map::kBitFieldOffset)); in Generate_Call() local
2566 __ ldrb(flags, FieldMemOperand(map, Map::kBitFieldOffset)); in Generate_Construct() local
3006 __ ldrb(r9, MemOperand(r9, 0)); in CallApiFunctionAndReturn() local
[all …]
|
| /third_party/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 569 __ ldrb(Narrow, r3, MemOperand(r5, 17)); in Generate_3() local
742 __ ldrb(Narrow, r3, MemOperand(r5, 17)); in Generate_5() local
863 __ ldrb(Narrow, r3, MemOperand(r5, 17)); in Generate_6() local
1152 __ ldrb(Narrow, r3, MemOperand(r5, 17)); in Generate_8() local
1354 __ ldrb(r3, MemOperand(sp, 656)); in Generate_10() local
1410 __ ldrb(r3, MemOperand(sp, 181)); in Generate_10() local
1798 __ ldrb(r3, MemOperand(sp, 209)); in Generate_14() local
1893 __ ldrb(r3, MemOperand(sp, 237)); in Generate_14() local
2061 __ ldrb(r3, MemOperand(sp, 293)); in Generate_16() local
2271 __ ldrb(r3, MemOperand(sp, 349)); in Generate_17() local
[all …]
|
| /third_party/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 185 __ ldrb(w3, MemOperand(x0)); in GenerateTestSequenceBase() local
186 __ ldrb(w3, MemOperand(x1, 1, PostIndex)); in GenerateTestSequenceBase() local
187 __ ldrb(w3, MemOperand(x1, 1, PreIndex)); in GenerateTestSequenceBase() local
188 __ ldrb(x4, MemOperand(x0)); in GenerateTestSequenceBase() local
189 __ ldrb(x4, MemOperand(x1, 1, PostIndex)); in GenerateTestSequenceBase() local
190 __ ldrb(x4, MemOperand(x1, 1, PreIndex)); in GenerateTestSequenceBase() local
|
| D | test-assembler-aarch64.cc | 11357 __ ldrb(w2, MemOperand(x0, offset), RequireScaledOffset); in TEST() local
11586 __ ldrb(w2, MemOperand(x0, preindex, PreIndex)); in TEST() local
11753 __ ldrb(w2, MemOperand(x0, postindex, PostIndex)); in TEST() local
11874 __ ldrb(w2, MemOperand(x0, x10)); in TEST() local
|
| /third_party/skia/src/core/ |
| D | SkVM.cpp | 2435 void Assembler::ldrb(X dst, X src, int imm12) { in ldrb() function in skvm::Assembler
2451 void Assembler::ldrb(V dst, X src, int imm12) { in ldrb() function in skvm::Assembler
|
| /third_party/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2435 void ldrb(Register rt, const MemOperand& operand) { in ldrb() function
2438 void ldrb(Condition cond, Register rt, const MemOperand& operand) { in ldrb() function
2441 void ldrb(EncodingSize size, Register rt, const MemOperand& operand) { in ldrb() function
2450 void ldrb(Register rt, Location* location) { ldrb(al, rt, location); } in ldrb() function
|
| D | assembler-aarch32.cc | 5311 void Assembler::ldrb(Condition cond, in ldrb() function in vixl::aarch32::Assembler
5491 void Assembler::ldrb(Condition cond, Register rt, Location* location) { in ldrb() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 1723 void Disassembler::ldrb(Condition cond, in ldrb() function in vixl::aarch32::Disassembler
1732 void Disassembler::ldrb(Condition cond, Register rt, Location* location) { in ldrb() function in vixl::aarch32::Disassembler
|
| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| D | code-generator-arm.cc | 1597 __ ldrb(i.OutputRegister(), i.InputOffset()); in AssembleArchInstruction() local
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | assembler-arm64.cc | 1273 void Assembler::ldrb(const Register& rt, const MemOperand& src) { in ldrb() function in v8::internal::Assembler
|
| /third_party/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 1188 void Assembler::ldrb(const Register& rt, in ldrb() function in vixl::aarch64::Assembler
|
| /third_party/node/deps/v8/src/codegen/arm/ |
| D | assembler-arm.cc | 2098 void Assembler::ldrb(Register dst, const MemOperand& src, Condition cond) { in ldrb() function in v8::internal::Assembler
|