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1 /*
2  *  AES-NI support functions
3  *
4  *  Copyright The Mbed TLS Contributors
5  *  SPDX-License-Identifier: Apache-2.0
6  *
7  *  Licensed under the Apache License, Version 2.0 (the "License"); you may
8  *  not use this file except in compliance with the License.
9  *  You may obtain a copy of the License at
10  *
11  *  http://www.apache.org/licenses/LICENSE-2.0
12  *
13  *  Unless required by applicable law or agreed to in writing, software
14  *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
15  *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  *  See the License for the specific language governing permissions and
17  *  limitations under the License.
18  */
19 
20 /*
21  * [AES-WP] https://www.intel.com/content/www/us/en/developer/articles/tool/intel-advanced-encryption-standard-aes-instructions-set.html
22  * [CLMUL-WP] https://www.intel.com/content/www/us/en/develop/download/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode.html
23  */
24 
25 #include "common.h"
26 
27 #if defined(MBEDTLS_AESNI_C)
28 
29 #include "aesni.h"
30 
31 #include <string.h>
32 
33 #if defined(MBEDTLS_AESNI_HAVE_CODE)
34 
35 #if MBEDTLS_AESNI_HAVE_CODE == 2
36 #if !defined(_WIN32)
37 #include <cpuid.h>
38 #else
39 #include <intrin.h>
40 #endif
41 #include <immintrin.h>
42 #endif
43 
44 /*
45  * AES-NI support detection routine
46  */
mbedtls_aesni_has_support(unsigned int what)47 int mbedtls_aesni_has_support(unsigned int what)
48 {
49     static int done = 0;
50     static unsigned int c = 0;
51 
52     if (!done) {
53 #if MBEDTLS_AESNI_HAVE_CODE == 2
54         static unsigned info[4] = { 0, 0, 0, 0 };
55 #if defined(_MSC_VER)
56         __cpuid(info, 1);
57 #else
58         __cpuid(1, info[0], info[1], info[2], info[3]);
59 #endif
60         c = info[2];
61 #else /* AESNI using asm */
62         asm ("movl  $1, %%eax   \n\t"
63              "cpuid             \n\t"
64              : "=c" (c)
65              :
66              : "eax", "ebx", "edx");
67 #endif /* MBEDTLS_AESNI_HAVE_CODE */
68         done = 1;
69     }
70 
71     return (c & what) != 0;
72 }
73 
74 #if MBEDTLS_AESNI_HAVE_CODE == 2
75 
76 /*
77  * AES-NI AES-ECB block en(de)cryption
78  */
mbedtls_aesni_crypt_ecb(mbedtls_aes_context * ctx,int mode,const unsigned char input[16],unsigned char output[16])79 int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx,
80                             int mode,
81                             const unsigned char input[16],
82                             unsigned char output[16])
83 {
84     const __m128i *rk = (const __m128i *) (ctx->buf + ctx->rk_offset);
85     unsigned nr = ctx->nr; // Number of remaining rounds
86 
87     // Load round key 0
88     __m128i state;
89     memcpy(&state, input, 16);
90     state = _mm_xor_si128(state, rk[0]);  // state ^= *rk;
91     ++rk;
92     --nr;
93 
94     if (mode == 0) {
95         while (nr != 0) {
96             state = _mm_aesdec_si128(state, *rk);
97             ++rk;
98             --nr;
99         }
100         state = _mm_aesdeclast_si128(state, *rk);
101     } else {
102         while (nr != 0) {
103             state = _mm_aesenc_si128(state, *rk);
104             ++rk;
105             --nr;
106         }
107         state = _mm_aesenclast_si128(state, *rk);
108     }
109 
110     memcpy(output, &state, 16);
111     return 0;
112 }
113 
114 /*
115  * GCM multiplication: c = a times b in GF(2^128)
116  * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
117  */
118 
gcm_clmul(const __m128i aa,const __m128i bb,__m128i * cc,__m128i * dd)119 static void gcm_clmul(const __m128i aa, const __m128i bb,
120                       __m128i *cc, __m128i *dd)
121 {
122     /*
123      * Caryless multiplication dd:cc = aa * bb
124      * using [CLMUL-WP] algorithm 1 (p. 12).
125      */
126     *cc = _mm_clmulepi64_si128(aa, bb, 0x00); // a0*b0 = c1:c0
127     *dd = _mm_clmulepi64_si128(aa, bb, 0x11); // a1*b1 = d1:d0
128     __m128i ee = _mm_clmulepi64_si128(aa, bb, 0x10); // a0*b1 = e1:e0
129     __m128i ff = _mm_clmulepi64_si128(aa, bb, 0x01); // a1*b0 = f1:f0
130     ff = _mm_xor_si128(ff, ee);                      // e1+f1:e0+f0
131     ee = ff;                                         // e1+f1:e0+f0
132     ff = _mm_srli_si128(ff, 8);                      // 0:e1+f1
133     ee = _mm_slli_si128(ee, 8);                      // e0+f0:0
134     *dd = _mm_xor_si128(*dd, ff);                    // d1:d0+e1+f1
135     *cc = _mm_xor_si128(*cc, ee);                    // c1+e0+f0:c0
136 }
137 
gcm_shift(__m128i * cc,__m128i * dd)138 static void gcm_shift(__m128i *cc, __m128i *dd)
139 {
140     /* [CMUCL-WP] Algorithm 5 Step 1: shift cc:dd one bit to the left,
141      * taking advantage of [CLMUL-WP] eq 27 (p. 18). */
142     //                                        // *cc = r1:r0
143     //                                        // *dd = r3:r2
144     __m128i cc_lo = _mm_slli_epi64(*cc, 1);   // r1<<1:r0<<1
145     __m128i dd_lo = _mm_slli_epi64(*dd, 1);   // r3<<1:r2<<1
146     __m128i cc_hi = _mm_srli_epi64(*cc, 63);  // r1>>63:r0>>63
147     __m128i dd_hi = _mm_srli_epi64(*dd, 63);  // r3>>63:r2>>63
148     __m128i xmm5 = _mm_srli_si128(cc_hi, 8);  // 0:r1>>63
149     cc_hi = _mm_slli_si128(cc_hi, 8);         // r0>>63:0
150     dd_hi = _mm_slli_si128(dd_hi, 8);         // 0:r1>>63
151 
152     *cc = _mm_or_si128(cc_lo, cc_hi);         // r1<<1|r0>>63:r0<<1
153     *dd = _mm_or_si128(_mm_or_si128(dd_lo, dd_hi), xmm5); // r3<<1|r2>>62:r2<<1|r1>>63
154 }
155 
gcm_reduce(__m128i xx)156 static __m128i gcm_reduce(__m128i xx)
157 {
158     //                                            // xx = x1:x0
159     /* [CLMUL-WP] Algorithm 5 Step 2 */
160     __m128i aa = _mm_slli_epi64(xx, 63);          // x1<<63:x0<<63 = stuff:a
161     __m128i bb = _mm_slli_epi64(xx, 62);          // x1<<62:x0<<62 = stuff:b
162     __m128i cc = _mm_slli_epi64(xx, 57);          // x1<<57:x0<<57 = stuff:c
163     __m128i dd = _mm_slli_si128(_mm_xor_si128(_mm_xor_si128(aa, bb), cc), 8); // a+b+c:0
164     return _mm_xor_si128(dd, xx);                 // x1+a+b+c:x0 = d:x0
165 }
166 
gcm_mix(__m128i dx)167 static __m128i gcm_mix(__m128i dx)
168 {
169     /* [CLMUL-WP] Algorithm 5 Steps 3 and 4 */
170     __m128i ee = _mm_srli_epi64(dx, 1);           // e1:x0>>1 = e1:e0'
171     __m128i ff = _mm_srli_epi64(dx, 2);           // f1:x0>>2 = f1:f0'
172     __m128i gg = _mm_srli_epi64(dx, 7);           // g1:x0>>7 = g1:g0'
173 
174     // e0'+f0'+g0' is almost e0+f0+g0, except for some missing
175     // bits carried from d. Now get those bits back in.
176     __m128i eh = _mm_slli_epi64(dx, 63);          // d<<63:stuff
177     __m128i fh = _mm_slli_epi64(dx, 62);          // d<<62:stuff
178     __m128i gh = _mm_slli_epi64(dx, 57);          // d<<57:stuff
179     __m128i hh = _mm_srli_si128(_mm_xor_si128(_mm_xor_si128(eh, fh), gh), 8); // 0:missing bits of d
180 
181     return _mm_xor_si128(_mm_xor_si128(_mm_xor_si128(_mm_xor_si128(ee, ff), gg), hh), dx);
182 }
183 
mbedtls_aesni_gcm_mult(unsigned char c[16],const unsigned char a[16],const unsigned char b[16])184 void mbedtls_aesni_gcm_mult(unsigned char c[16],
185                             const unsigned char a[16],
186                             const unsigned char b[16])
187 {
188     __m128i aa, bb, cc, dd;
189 
190     /* The inputs are in big-endian order, so byte-reverse them */
191     for (size_t i = 0; i < 16; i++) {
192         ((uint8_t *) &aa)[i] = a[15 - i];
193         ((uint8_t *) &bb)[i] = b[15 - i];
194     }
195 
196     gcm_clmul(aa, bb, &cc, &dd);
197     gcm_shift(&cc, &dd);
198     /*
199      * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
200      * using [CLMUL-WP] algorithm 5 (p. 18).
201      * Currently dd:cc holds x3:x2:x1:x0 (already shifted).
202      */
203     __m128i dx = gcm_reduce(cc);
204     __m128i xh = gcm_mix(dx);
205     cc = _mm_xor_si128(xh, dd); // x3+h1:x2+h0
206 
207     /* Now byte-reverse the outputs */
208     for (size_t i = 0; i < 16; i++) {
209         c[i] = ((uint8_t *) &cc)[15 - i];
210     }
211 
212     return;
213 }
214 
215 /*
216  * Compute decryption round keys from encryption round keys
217  */
mbedtls_aesni_inverse_key(unsigned char * invkey,const unsigned char * fwdkey,int nr)218 void mbedtls_aesni_inverse_key(unsigned char *invkey,
219                                const unsigned char *fwdkey, int nr)
220 {
221     __m128i *ik = (__m128i *) invkey;
222     const __m128i *fk = (const __m128i *) fwdkey + nr;
223 
224     *ik = *fk;
225     for (--fk, ++ik; fk > (const __m128i *) fwdkey; --fk, ++ik) {
226         *ik = _mm_aesimc_si128(*fk);
227     }
228     *ik = *fk;
229 }
230 
231 /*
232  * Key expansion, 128-bit case
233  */
aesni_set_rk_128(__m128i state,__m128i xword)234 static __m128i aesni_set_rk_128(__m128i state, __m128i xword)
235 {
236     /*
237      * Finish generating the next round key.
238      *
239      * On entry state is r3:r2:r1:r0 and xword is X:stuff:stuff:stuff
240      * with X = rot( sub( r3 ) ) ^ RCON (obtained with AESKEYGENASSIST).
241      *
242      * On exit, xword is r7:r6:r5:r4
243      * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
244      * and this is returned, to be written to the round key buffer.
245      */
246     xword = _mm_shuffle_epi32(xword, 0xff);   // X:X:X:X
247     xword = _mm_xor_si128(xword, state);      // X+r3:X+r2:X+r1:r4
248     state = _mm_slli_si128(state, 4);         // r2:r1:r0:0
249     xword = _mm_xor_si128(xword, state);      // X+r3+r2:X+r2+r1:r5:r4
250     state = _mm_slli_si128(state, 4);         // r1:r0:0:0
251     xword = _mm_xor_si128(xword, state);      // X+r3+r2+r1:r6:r5:r4
252     state = _mm_slli_si128(state, 4);         // r0:0:0:0
253     state = _mm_xor_si128(xword, state);      // r7:r6:r5:r4
254     return state;
255 }
256 
aesni_setkey_enc_128(unsigned char * rk_bytes,const unsigned char * key)257 static void aesni_setkey_enc_128(unsigned char *rk_bytes,
258                                  const unsigned char *key)
259 {
260     __m128i *rk = (__m128i *) rk_bytes;
261 
262     memcpy(&rk[0], key, 16);
263     rk[1] = aesni_set_rk_128(rk[0], _mm_aeskeygenassist_si128(rk[0], 0x01));
264     rk[2] = aesni_set_rk_128(rk[1], _mm_aeskeygenassist_si128(rk[1], 0x02));
265     rk[3] = aesni_set_rk_128(rk[2], _mm_aeskeygenassist_si128(rk[2], 0x04));
266     rk[4] = aesni_set_rk_128(rk[3], _mm_aeskeygenassist_si128(rk[3], 0x08));
267     rk[5] = aesni_set_rk_128(rk[4], _mm_aeskeygenassist_si128(rk[4], 0x10));
268     rk[6] = aesni_set_rk_128(rk[5], _mm_aeskeygenassist_si128(rk[5], 0x20));
269     rk[7] = aesni_set_rk_128(rk[6], _mm_aeskeygenassist_si128(rk[6], 0x40));
270     rk[8] = aesni_set_rk_128(rk[7], _mm_aeskeygenassist_si128(rk[7], 0x80));
271     rk[9] = aesni_set_rk_128(rk[8], _mm_aeskeygenassist_si128(rk[8], 0x1B));
272     rk[10] = aesni_set_rk_128(rk[9], _mm_aeskeygenassist_si128(rk[9], 0x36));
273 }
274 
275 /*
276  * Key expansion, 192-bit case
277  */
aesni_set_rk_192(__m128i * state0,__m128i * state1,__m128i xword,unsigned char * rk)278 static void aesni_set_rk_192(__m128i *state0, __m128i *state1, __m128i xword,
279                              unsigned char *rk)
280 {
281     /*
282      * Finish generating the next 6 quarter-keys.
283      *
284      * On entry state0 is r3:r2:r1:r0, state1 is stuff:stuff:r5:r4
285      * and xword is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON
286      * (obtained with AESKEYGENASSIST).
287      *
288      * On exit, state0 is r9:r8:r7:r6 and state1 is stuff:stuff:r11:r10
289      * and those are written to the round key buffer.
290      */
291     xword = _mm_shuffle_epi32(xword, 0x55);   // X:X:X:X
292     xword = _mm_xor_si128(xword, *state0);    // X+r3:X+r2:X+r1:X+r0
293     *state0 = _mm_slli_si128(*state0, 4);     // r2:r1:r0:0
294     xword = _mm_xor_si128(xword, *state0);    // X+r3+r2:X+r2+r1:X+r1+r0:X+r0
295     *state0 = _mm_slli_si128(*state0, 4);     // r1:r0:0:0
296     xword = _mm_xor_si128(xword, *state0);    // X+r3+r2+r1:X+r2+r1+r0:X+r1+r0:X+r0
297     *state0 = _mm_slli_si128(*state0, 4);     // r0:0:0:0
298     xword = _mm_xor_si128(xword, *state0);    // X+r3+r2+r1+r0:X+r2+r1+r0:X+r1+r0:X+r0
299     *state0 = xword;                          // = r9:r8:r7:r6
300 
301     xword = _mm_shuffle_epi32(xword, 0xff);   // r9:r9:r9:r9
302     xword = _mm_xor_si128(xword, *state1);    // stuff:stuff:r9+r5:r9+r4
303     *state1 = _mm_slli_si128(*state1, 4);     // stuff:stuff:r4:0
304     xword = _mm_xor_si128(xword, *state1);    // stuff:stuff:r9+r5+r4:r9+r4
305     *state1 = xword;                          // = stuff:stuff:r11:r10
306 
307     /* Store state0 and the low half of state1 into rk, which is conceptually
308      * an array of 24-byte elements. Since 24 is not a multiple of 16,
309      * rk is not necessarily aligned so just `*rk = *state0` doesn't work. */
310     memcpy(rk, state0, 16);
311     memcpy(rk + 16, state1, 8);
312 }
313 
aesni_setkey_enc_192(unsigned char * rk,const unsigned char * key)314 static void aesni_setkey_enc_192(unsigned char *rk,
315                                  const unsigned char *key)
316 {
317     /* First round: use original key */
318     memcpy(rk, key, 24);
319     /* aes.c guarantees that rk is aligned on a 16-byte boundary. */
320     __m128i state0 = ((__m128i *) rk)[0];
321     __m128i state1 = _mm_loadl_epi64(((__m128i *) rk) + 1);
322 
323     aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x01), rk + 24 * 1);
324     aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x02), rk + 24 * 2);
325     aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x04), rk + 24 * 3);
326     aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x08), rk + 24 * 4);
327     aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x10), rk + 24 * 5);
328     aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x20), rk + 24 * 6);
329     aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x40), rk + 24 * 7);
330     aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x80), rk + 24 * 8);
331 }
332 
333 /*
334  * Key expansion, 256-bit case
335  */
aesni_set_rk_256(__m128i state0,__m128i state1,__m128i xword,__m128i * rk0,__m128i * rk1)336 static void aesni_set_rk_256(__m128i state0, __m128i state1, __m128i xword,
337                              __m128i *rk0, __m128i *rk1)
338 {
339     /*
340      * Finish generating the next two round keys.
341      *
342      * On entry state0 is r3:r2:r1:r0, state1 is r7:r6:r5:r4 and
343      * xword is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
344      * (obtained with AESKEYGENASSIST).
345      *
346      * On exit, *rk0 is r11:r10:r9:r8 and *rk1 is r15:r14:r13:r12
347      */
348     xword = _mm_shuffle_epi32(xword, 0xff);
349     xword = _mm_xor_si128(xword, state0);
350     state0 = _mm_slli_si128(state0, 4);
351     xword = _mm_xor_si128(xword, state0);
352     state0 = _mm_slli_si128(state0, 4);
353     xword = _mm_xor_si128(xword, state0);
354     state0 = _mm_slli_si128(state0, 4);
355     state0 = _mm_xor_si128(state0, xword);
356     *rk0 = state0;
357 
358     /* Set xword to stuff:Y:stuff:stuff with Y = subword( r11 )
359      * and proceed to generate next round key from there */
360     xword = _mm_aeskeygenassist_si128(state0, 0x00);
361     xword = _mm_shuffle_epi32(xword, 0xaa);
362     xword = _mm_xor_si128(xword, state1);
363     state1 = _mm_slli_si128(state1, 4);
364     xword = _mm_xor_si128(xword, state1);
365     state1 = _mm_slli_si128(state1, 4);
366     xword = _mm_xor_si128(xword, state1);
367     state1 = _mm_slli_si128(state1, 4);
368     state1 = _mm_xor_si128(state1, xword);
369     *rk1 = state1;
370 }
371 
aesni_setkey_enc_256(unsigned char * rk_bytes,const unsigned char * key)372 static void aesni_setkey_enc_256(unsigned char *rk_bytes,
373                                  const unsigned char *key)
374 {
375     __m128i *rk = (__m128i *) rk_bytes;
376 
377     memcpy(&rk[0], key, 16);
378     memcpy(&rk[1], key + 16, 16);
379 
380     /*
381      * Main "loop" - Generating one more key than necessary,
382      * see definition of mbedtls_aes_context.buf
383      */
384     aesni_set_rk_256(rk[0], rk[1], _mm_aeskeygenassist_si128(rk[1], 0x01), &rk[2], &rk[3]);
385     aesni_set_rk_256(rk[2], rk[3], _mm_aeskeygenassist_si128(rk[3], 0x02), &rk[4], &rk[5]);
386     aesni_set_rk_256(rk[4], rk[5], _mm_aeskeygenassist_si128(rk[5], 0x04), &rk[6], &rk[7]);
387     aesni_set_rk_256(rk[6], rk[7], _mm_aeskeygenassist_si128(rk[7], 0x08), &rk[8], &rk[9]);
388     aesni_set_rk_256(rk[8], rk[9], _mm_aeskeygenassist_si128(rk[9], 0x10), &rk[10], &rk[11]);
389     aesni_set_rk_256(rk[10], rk[11], _mm_aeskeygenassist_si128(rk[11], 0x20), &rk[12], &rk[13]);
390     aesni_set_rk_256(rk[12], rk[13], _mm_aeskeygenassist_si128(rk[13], 0x40), &rk[14], &rk[15]);
391 }
392 
393 #else /* MBEDTLS_AESNI_HAVE_CODE == 1 */
394 
395 #if defined(__has_feature)
396 #if __has_feature(memory_sanitizer)
397 #warning \
398     "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
399 #endif
400 #endif
401 
402 /*
403  * Binutils needs to be at least 2.19 to support AES-NI instructions.
404  * Unfortunately, a lot of users have a lower version now (2014-04).
405  * Emit bytecode directly in order to support "old" version of gas.
406  *
407  * Opcodes from the Intel architecture reference manual, vol. 3.
408  * We always use registers, so we don't need prefixes for memory operands.
409  * Operand macros are in gas order (src, dst) as opposed to Intel order
410  * (dst, src) in order to blend better into the surrounding assembly code.
411  */
412 #define AESDEC(regs)      ".byte 0x66,0x0F,0x38,0xDE," regs "\n\t"
413 #define AESDECLAST(regs)  ".byte 0x66,0x0F,0x38,0xDF," regs "\n\t"
414 #define AESENC(regs)      ".byte 0x66,0x0F,0x38,0xDC," regs "\n\t"
415 #define AESENCLAST(regs)  ".byte 0x66,0x0F,0x38,0xDD," regs "\n\t"
416 #define AESIMC(regs)      ".byte 0x66,0x0F,0x38,0xDB," regs "\n\t"
417 #define AESKEYGENA(regs, imm)  ".byte 0x66,0x0F,0x3A,0xDF," regs "," imm "\n\t"
418 #define PCLMULQDQ(regs, imm)   ".byte 0x66,0x0F,0x3A,0x44," regs "," imm "\n\t"
419 
420 #define xmm0_xmm0   "0xC0"
421 #define xmm0_xmm1   "0xC8"
422 #define xmm0_xmm2   "0xD0"
423 #define xmm0_xmm3   "0xD8"
424 #define xmm0_xmm4   "0xE0"
425 #define xmm1_xmm0   "0xC1"
426 #define xmm1_xmm2   "0xD1"
427 
428 /*
429  * AES-NI AES-ECB block en(de)cryption
430  */
mbedtls_aesni_crypt_ecb(mbedtls_aes_context * ctx,int mode,const unsigned char input[16],unsigned char output[16])431 int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx,
432                             int mode,
433                             const unsigned char input[16],
434                             unsigned char output[16])
435 {
436     asm ("movdqu    (%3), %%xmm0    \n\t" // load input
437          "movdqu    (%1), %%xmm1    \n\t" // load round key 0
438          "pxor      %%xmm1, %%xmm0  \n\t" // round 0
439          "add       $16, %1         \n\t" // point to next round key
440          "subl      $1, %0          \n\t" // normal rounds = nr - 1
441          "test      %2, %2          \n\t" // mode?
442          "jz        2f              \n\t" // 0 = decrypt
443 
444          "1:                        \n\t" // encryption loop
445          "movdqu    (%1), %%xmm1    \n\t" // load round key
446          AESENC(xmm1_xmm0)                // do round
447          "add       $16, %1         \n\t" // point to next round key
448          "subl      $1, %0          \n\t" // loop
449          "jnz       1b              \n\t"
450          "movdqu    (%1), %%xmm1    \n\t" // load round key
451          AESENCLAST(xmm1_xmm0)            // last round
452          "jmp       3f              \n\t"
453 
454          "2:                        \n\t" // decryption loop
455          "movdqu    (%1), %%xmm1    \n\t"
456          AESDEC(xmm1_xmm0)                // do round
457          "add       $16, %1         \n\t"
458          "subl      $1, %0          \n\t"
459          "jnz       2b              \n\t"
460          "movdqu    (%1), %%xmm1    \n\t" // load round key
461          AESDECLAST(xmm1_xmm0)            // last round
462 
463          "3:                        \n\t"
464          "movdqu    %%xmm0, (%4)    \n\t" // export output
465          :
466          : "r" (ctx->nr), "r" (ctx->buf + ctx->rk_offset), "r" (mode), "r" (input), "r" (output)
467          : "memory", "cc", "xmm0", "xmm1");
468 
469 
470     return 0;
471 }
472 
473 /*
474  * GCM multiplication: c = a times b in GF(2^128)
475  * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
476  */
mbedtls_aesni_gcm_mult(unsigned char c[16],const unsigned char a[16],const unsigned char b[16])477 void mbedtls_aesni_gcm_mult(unsigned char c[16],
478                             const unsigned char a[16],
479                             const unsigned char b[16])
480 {
481     unsigned char aa[16], bb[16], cc[16];
482     size_t i;
483 
484     /* The inputs are in big-endian order, so byte-reverse them */
485     for (i = 0; i < 16; i++) {
486         aa[i] = a[15 - i];
487         bb[i] = b[15 - i];
488     }
489 
490     asm ("movdqu (%0), %%xmm0               \n\t" // a1:a0
491          "movdqu (%1), %%xmm1               \n\t" // b1:b0
492 
493          /*
494           * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
495           * using [CLMUL-WP] algorithm 1 (p. 12).
496           */
497          "movdqa %%xmm1, %%xmm2             \n\t" // copy of b1:b0
498          "movdqa %%xmm1, %%xmm3             \n\t" // same
499          "movdqa %%xmm1, %%xmm4             \n\t" // same
500          PCLMULQDQ(xmm0_xmm1, "0x00")             // a0*b0 = c1:c0
501          PCLMULQDQ(xmm0_xmm2, "0x11")             // a1*b1 = d1:d0
502          PCLMULQDQ(xmm0_xmm3, "0x10")             // a0*b1 = e1:e0
503          PCLMULQDQ(xmm0_xmm4, "0x01")             // a1*b0 = f1:f0
504          "pxor %%xmm3, %%xmm4               \n\t" // e1+f1:e0+f0
505          "movdqa %%xmm4, %%xmm3             \n\t" // same
506          "psrldq $8, %%xmm4                 \n\t" // 0:e1+f1
507          "pslldq $8, %%xmm3                 \n\t" // e0+f0:0
508          "pxor %%xmm4, %%xmm2               \n\t" // d1:d0+e1+f1
509          "pxor %%xmm3, %%xmm1               \n\t" // c1+e0+f1:c0
510 
511          /*
512           * Now shift the result one bit to the left,
513           * taking advantage of [CLMUL-WP] eq 27 (p. 18)
514           */
515          "movdqa %%xmm1, %%xmm3             \n\t" // r1:r0
516          "movdqa %%xmm2, %%xmm4             \n\t" // r3:r2
517          "psllq $1, %%xmm1                  \n\t" // r1<<1:r0<<1
518          "psllq $1, %%xmm2                  \n\t" // r3<<1:r2<<1
519          "psrlq $63, %%xmm3                 \n\t" // r1>>63:r0>>63
520          "psrlq $63, %%xmm4                 \n\t" // r3>>63:r2>>63
521          "movdqa %%xmm3, %%xmm5             \n\t" // r1>>63:r0>>63
522          "pslldq $8, %%xmm3                 \n\t" // r0>>63:0
523          "pslldq $8, %%xmm4                 \n\t" // r2>>63:0
524          "psrldq $8, %%xmm5                 \n\t" // 0:r1>>63
525          "por %%xmm3, %%xmm1                \n\t" // r1<<1|r0>>63:r0<<1
526          "por %%xmm4, %%xmm2                \n\t" // r3<<1|r2>>62:r2<<1
527          "por %%xmm5, %%xmm2                \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
528 
529          /*
530           * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
531           * using [CLMUL-WP] algorithm 5 (p. 18).
532           * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
533           */
534          /* Step 2 (1) */
535          "movdqa %%xmm1, %%xmm3             \n\t" // x1:x0
536          "movdqa %%xmm1, %%xmm4             \n\t" // same
537          "movdqa %%xmm1, %%xmm5             \n\t" // same
538          "psllq $63, %%xmm3                 \n\t" // x1<<63:x0<<63 = stuff:a
539          "psllq $62, %%xmm4                 \n\t" // x1<<62:x0<<62 = stuff:b
540          "psllq $57, %%xmm5                 \n\t" // x1<<57:x0<<57 = stuff:c
541 
542          /* Step 2 (2) */
543          "pxor %%xmm4, %%xmm3               \n\t" // stuff:a+b
544          "pxor %%xmm5, %%xmm3               \n\t" // stuff:a+b+c
545          "pslldq $8, %%xmm3                 \n\t" // a+b+c:0
546          "pxor %%xmm3, %%xmm1               \n\t" // x1+a+b+c:x0 = d:x0
547 
548          /* Steps 3 and 4 */
549          "movdqa %%xmm1,%%xmm0              \n\t" // d:x0
550          "movdqa %%xmm1,%%xmm4              \n\t" // same
551          "movdqa %%xmm1,%%xmm5              \n\t" // same
552          "psrlq $1, %%xmm0                  \n\t" // e1:x0>>1 = e1:e0'
553          "psrlq $2, %%xmm4                  \n\t" // f1:x0>>2 = f1:f0'
554          "psrlq $7, %%xmm5                  \n\t" // g1:x0>>7 = g1:g0'
555          "pxor %%xmm4, %%xmm0               \n\t" // e1+f1:e0'+f0'
556          "pxor %%xmm5, %%xmm0               \n\t" // e1+f1+g1:e0'+f0'+g0'
557          // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
558          // bits carried from d. Now get those\t bits back in.
559          "movdqa %%xmm1,%%xmm3              \n\t" // d:x0
560          "movdqa %%xmm1,%%xmm4              \n\t" // same
561          "movdqa %%xmm1,%%xmm5              \n\t" // same
562          "psllq $63, %%xmm3                 \n\t" // d<<63:stuff
563          "psllq $62, %%xmm4                 \n\t" // d<<62:stuff
564          "psllq $57, %%xmm5                 \n\t" // d<<57:stuff
565          "pxor %%xmm4, %%xmm3               \n\t" // d<<63+d<<62:stuff
566          "pxor %%xmm5, %%xmm3               \n\t" // missing bits of d:stuff
567          "psrldq $8, %%xmm3                 \n\t" // 0:missing bits of d
568          "pxor %%xmm3, %%xmm0               \n\t" // e1+f1+g1:e0+f0+g0
569          "pxor %%xmm1, %%xmm0               \n\t" // h1:h0
570          "pxor %%xmm2, %%xmm0               \n\t" // x3+h1:x2+h0
571 
572          "movdqu %%xmm0, (%2)               \n\t" // done
573          :
574          : "r" (aa), "r" (bb), "r" (cc)
575          : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5");
576 
577     /* Now byte-reverse the outputs */
578     for (i = 0; i < 16; i++) {
579         c[i] = cc[15 - i];
580     }
581 
582     return;
583 }
584 
585 /*
586  * Compute decryption round keys from encryption round keys
587  */
mbedtls_aesni_inverse_key(unsigned char * invkey,const unsigned char * fwdkey,int nr)588 void mbedtls_aesni_inverse_key(unsigned char *invkey,
589                                const unsigned char *fwdkey, int nr)
590 {
591     unsigned char *ik = invkey;
592     const unsigned char *fk = fwdkey + 16 * nr;
593 
594     memcpy(ik, fk, 16);
595 
596     for (fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16) {
597         asm ("movdqu (%0), %%xmm0       \n\t"
598              AESIMC(xmm0_xmm0)
599              "movdqu %%xmm0, (%1)       \n\t"
600              :
601              : "r" (fk), "r" (ik)
602              : "memory", "xmm0");
603     }
604 
605     memcpy(ik, fk, 16);
606 }
607 
608 /*
609  * Key expansion, 128-bit case
610  */
aesni_setkey_enc_128(unsigned char * rk,const unsigned char * key)611 static void aesni_setkey_enc_128(unsigned char *rk,
612                                  const unsigned char *key)
613 {
614     asm ("movdqu (%1), %%xmm0               \n\t" // copy the original key
615          "movdqu %%xmm0, (%0)               \n\t" // as round key 0
616          "jmp 2f                            \n\t" // skip auxiliary routine
617 
618          /*
619           * Finish generating the next round key.
620           *
621           * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
622           * with X = rot( sub( r3 ) ) ^ RCON.
623           *
624           * On exit, xmm0 is r7:r6:r5:r4
625           * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
626           * and those are written to the round key buffer.
627           */
628          "1:                                \n\t"
629          "pshufd $0xff, %%xmm1, %%xmm1      \n\t" // X:X:X:X
630          "pxor %%xmm0, %%xmm1               \n\t" // X+r3:X+r2:X+r1:r4
631          "pslldq $4, %%xmm0                 \n\t" // r2:r1:r0:0
632          "pxor %%xmm0, %%xmm1               \n\t" // X+r3+r2:X+r2+r1:r5:r4
633          "pslldq $4, %%xmm0                 \n\t" // etc
634          "pxor %%xmm0, %%xmm1               \n\t"
635          "pslldq $4, %%xmm0                 \n\t"
636          "pxor %%xmm1, %%xmm0               \n\t" // update xmm0 for next time!
637          "add $16, %0                       \n\t" // point to next round key
638          "movdqu %%xmm0, (%0)               \n\t" // write it
639          "ret                               \n\t"
640 
641          /* Main "loop" */
642          "2:                                \n\t"
643          AESKEYGENA(xmm0_xmm1, "0x01")      "call 1b \n\t"
644          AESKEYGENA(xmm0_xmm1, "0x02")      "call 1b \n\t"
645          AESKEYGENA(xmm0_xmm1, "0x04")      "call 1b \n\t"
646          AESKEYGENA(xmm0_xmm1, "0x08")      "call 1b \n\t"
647          AESKEYGENA(xmm0_xmm1, "0x10")      "call 1b \n\t"
648          AESKEYGENA(xmm0_xmm1, "0x20")      "call 1b \n\t"
649          AESKEYGENA(xmm0_xmm1, "0x40")      "call 1b \n\t"
650          AESKEYGENA(xmm0_xmm1, "0x80")      "call 1b \n\t"
651          AESKEYGENA(xmm0_xmm1, "0x1B")      "call 1b \n\t"
652          AESKEYGENA(xmm0_xmm1, "0x36")      "call 1b \n\t"
653          :
654          : "r" (rk), "r" (key)
655          : "memory", "cc", "0");
656 }
657 
658 /*
659  * Key expansion, 192-bit case
660  */
aesni_setkey_enc_192(unsigned char * rk,const unsigned char * key)661 static void aesni_setkey_enc_192(unsigned char *rk,
662                                  const unsigned char *key)
663 {
664     asm ("movdqu (%1), %%xmm0   \n\t" // copy original round key
665          "movdqu %%xmm0, (%0)   \n\t"
666          "add $16, %0           \n\t"
667          "movq 16(%1), %%xmm1   \n\t"
668          "movq %%xmm1, (%0)     \n\t"
669          "add $8, %0            \n\t"
670          "jmp 2f                \n\t" // skip auxiliary routine
671 
672          /*
673           * Finish generating the next 6 quarter-keys.
674           *
675           * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
676           * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
677           *
678           * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
679           * and those are written to the round key buffer.
680           */
681          "1:                            \n\t"
682          "pshufd $0x55, %%xmm2, %%xmm2  \n\t" // X:X:X:X
683          "pxor %%xmm0, %%xmm2           \n\t" // X+r3:X+r2:X+r1:r4
684          "pslldq $4, %%xmm0             \n\t" // etc
685          "pxor %%xmm0, %%xmm2           \n\t"
686          "pslldq $4, %%xmm0             \n\t"
687          "pxor %%xmm0, %%xmm2           \n\t"
688          "pslldq $4, %%xmm0             \n\t"
689          "pxor %%xmm2, %%xmm0           \n\t" // update xmm0 = r9:r8:r7:r6
690          "movdqu %%xmm0, (%0)           \n\t"
691          "add $16, %0                   \n\t"
692          "pshufd $0xff, %%xmm0, %%xmm2  \n\t" // r9:r9:r9:r9
693          "pxor %%xmm1, %%xmm2           \n\t" // stuff:stuff:r9+r5:r10
694          "pslldq $4, %%xmm1             \n\t" // r2:r1:r0:0
695          "pxor %%xmm2, %%xmm1           \n\t" // xmm1 = stuff:stuff:r11:r10
696          "movq %%xmm1, (%0)             \n\t"
697          "add $8, %0                    \n\t"
698          "ret                           \n\t"
699 
700          "2:                            \n\t"
701          AESKEYGENA(xmm1_xmm2, "0x01")  "call 1b \n\t"
702          AESKEYGENA(xmm1_xmm2, "0x02")  "call 1b \n\t"
703          AESKEYGENA(xmm1_xmm2, "0x04")  "call 1b \n\t"
704          AESKEYGENA(xmm1_xmm2, "0x08")  "call 1b \n\t"
705          AESKEYGENA(xmm1_xmm2, "0x10")  "call 1b \n\t"
706          AESKEYGENA(xmm1_xmm2, "0x20")  "call 1b \n\t"
707          AESKEYGENA(xmm1_xmm2, "0x40")  "call 1b \n\t"
708          AESKEYGENA(xmm1_xmm2, "0x80")  "call 1b \n\t"
709 
710          :
711          : "r" (rk), "r" (key)
712          : "memory", "cc", "0");
713 }
714 
715 /*
716  * Key expansion, 256-bit case
717  */
aesni_setkey_enc_256(unsigned char * rk,const unsigned char * key)718 static void aesni_setkey_enc_256(unsigned char *rk,
719                                  const unsigned char *key)
720 {
721     asm ("movdqu (%1), %%xmm0           \n\t"
722          "movdqu %%xmm0, (%0)           \n\t"
723          "add $16, %0                   \n\t"
724          "movdqu 16(%1), %%xmm1         \n\t"
725          "movdqu %%xmm1, (%0)           \n\t"
726          "jmp 2f                        \n\t" // skip auxiliary routine
727 
728          /*
729           * Finish generating the next two round keys.
730           *
731           * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
732           * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
733           *
734           * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
735           * and those have been written to the output buffer.
736           */
737          "1:                                \n\t"
738          "pshufd $0xff, %%xmm2, %%xmm2      \n\t"
739          "pxor %%xmm0, %%xmm2               \n\t"
740          "pslldq $4, %%xmm0                 \n\t"
741          "pxor %%xmm0, %%xmm2               \n\t"
742          "pslldq $4, %%xmm0                 \n\t"
743          "pxor %%xmm0, %%xmm2               \n\t"
744          "pslldq $4, %%xmm0                 \n\t"
745          "pxor %%xmm2, %%xmm0               \n\t"
746          "add $16, %0                       \n\t"
747          "movdqu %%xmm0, (%0)               \n\t"
748 
749          /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
750           * and proceed to generate next round key from there */
751          AESKEYGENA(xmm0_xmm2, "0x00")
752          "pshufd $0xaa, %%xmm2, %%xmm2      \n\t"
753          "pxor %%xmm1, %%xmm2               \n\t"
754          "pslldq $4, %%xmm1                 \n\t"
755          "pxor %%xmm1, %%xmm2               \n\t"
756          "pslldq $4, %%xmm1                 \n\t"
757          "pxor %%xmm1, %%xmm2               \n\t"
758          "pslldq $4, %%xmm1                 \n\t"
759          "pxor %%xmm2, %%xmm1               \n\t"
760          "add $16, %0                       \n\t"
761          "movdqu %%xmm1, (%0)               \n\t"
762          "ret                               \n\t"
763 
764          /*
765           * Main "loop" - Generating one more key than necessary,
766           * see definition of mbedtls_aes_context.buf
767           */
768          "2:                                \n\t"
769          AESKEYGENA(xmm1_xmm2, "0x01")      "call 1b \n\t"
770          AESKEYGENA(xmm1_xmm2, "0x02")      "call 1b \n\t"
771          AESKEYGENA(xmm1_xmm2, "0x04")      "call 1b \n\t"
772          AESKEYGENA(xmm1_xmm2, "0x08")      "call 1b \n\t"
773          AESKEYGENA(xmm1_xmm2, "0x10")      "call 1b \n\t"
774          AESKEYGENA(xmm1_xmm2, "0x20")      "call 1b \n\t"
775          AESKEYGENA(xmm1_xmm2, "0x40")      "call 1b \n\t"
776          :
777          : "r" (rk), "r" (key)
778          : "memory", "cc", "0");
779 }
780 
781 #endif  /* MBEDTLS_AESNI_HAVE_CODE */
782 
783 /*
784  * Key expansion, wrapper
785  */
mbedtls_aesni_setkey_enc(unsigned char * rk,const unsigned char * key,size_t bits)786 int mbedtls_aesni_setkey_enc(unsigned char *rk,
787                              const unsigned char *key,
788                              size_t bits)
789 {
790     switch (bits) {
791         case 128: aesni_setkey_enc_128(rk, key); break;
792         case 192: aesni_setkey_enc_192(rk, key); break;
793         case 256: aesni_setkey_enc_256(rk, key); break;
794         default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
795     }
796 
797     return 0;
798 }
799 
800 #endif /* MBEDTLS_AESNI_HAVE_CODE */
801 
802 #endif /* MBEDTLS_AESNI_C */
803