• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * Copyright (c) 2023 Huawei Device Co., Ltd.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef MAPLEBE_INCLUDE_CG_X64_X64_CALL_CONV_H
17 #define MAPLEBE_INCLUDE_CG_X64_X64_CALL_CONV_H
18 
19 #include "types_def.h"
20 #include "becommon.h"
21 #include "call_conv.h"
22 #include "abi.h"
23 #include "x64_abi.h"
24 #include "x64_isa.h"
25 #include <vector>
26 
27 namespace maplebe {
28 using namespace maple;
29 using namespace x64;
30 constexpr const uint32 kMaxStructParamByReg = 4;
31 
32 class CallConventionInfo {
33 public:
34     virtual const std::vector<X64reg> &GetIntParamRegs() const = 0;
35     virtual size_t GetIntParamRegsNum() const = 0;
36     virtual const std::vector<X64reg> &GetIntReturnRegs() const = 0;
37     virtual size_t GetIntReturnRegsNum() const = 0;
38     virtual const std::vector<X64reg> &GetFloatParamRegs() const = 0;
39     virtual size_t GetFloatParamRegsNum() const = 0;
40     virtual const std::vector<X64reg> &GetFloatReturnRegs() const = 0;
41     virtual size_t GetFloatReturnRegsNum() const = 0;
42     virtual int32 Classification(const BECommon &be, MIRType &mirType, std::vector<ArgumentClass> &classes) const = 0;
43 };
44 
45 #define CALL_CONVENTION_INFO_SUBCLASS_DECLARE_BEGIN(CLASSNAME)                    \
46     class CLASSNAME : public CallConventionInfo {                                 \
47     public:                                                                       \
48         const std::vector<X64reg> &GetIntParamRegs() const override               \
49         {                                                                         \
50             return intParmRegs;                                                   \
51         }                                                                         \
52         size_t GetIntParamRegsNum() const override                                \
53         {                                                                         \
54             return intParmRegs.size();                                            \
55         }                                                                         \
56         const std::vector<X64reg> &GetIntReturnRegs() const override              \
57         {                                                                         \
58             return intReturnRegs;                                                 \
59         }                                                                         \
60         size_t GetIntReturnRegsNum() const override                               \
61         {                                                                         \
62             return intReturnRegs.size();                                          \
63         }                                                                         \
64         const std::vector<X64reg> &GetFloatParamRegs() const override             \
65         {                                                                         \
66             return floatParmRegs;                                                 \
67         }                                                                         \
68         size_t GetFloatParamRegsNum() const override                              \
69         {                                                                         \
70             return floatParmRegs.size();                                          \
71         }                                                                         \
72         const std::vector<X64reg> &GetFloatReturnRegs() const override            \
73         {                                                                         \
74             return floatReturnRegs;                                               \
75         }                                                                         \
76         size_t GetFloatReturnRegsNum() const override                             \
77         {                                                                         \
78             return floatReturnRegs.size();                                        \
79         }                                                                         \
80         const static CLASSNAME &GetCallConvInfo()                                 \
81         {                                                                         \
82             static CLASSNAME callConvInfo;                                        \
83             return callConvInfo;                                                  \
84         }                                                                         \
85         int32 Classification(const BECommon &be, MIRType &mirType,                \
86                              std::vector<ArgumentClass> &classes) const override; \
87                                                                                   \
88     private:                                                                      \
89         CLASSNAME() {}                                                            \
90         ~CLASSNAME() {}                                                           \
91         CLASSNAME &operator=(const CLASSNAME &);                                  \
92         CLASSNAME(const CLASSNAME &);
93 
94 #define CALL_CONVENTION_INFO_SUBCLASS_DECLARE_END \
95     }                                             \
96     ;
97 
CALL_CONVENTION_INFO_SUBCLASS_DECLARE_BEGIN(WebKitJSCallConventionInfo)98 CALL_CONVENTION_INFO_SUBCLASS_DECLARE_BEGIN(WebKitJSCallConventionInfo)
99 const std::vector<X64reg> intParmRegs {R0};
100 const std::vector<X64reg> intReturnRegs {R0};
101 const std::vector<X64reg> floatParmRegs {};
102 const std::vector<X64reg> floatReturnRegs {};
103 CALL_CONVENTION_INFO_SUBCLASS_DECLARE_END
104 
CALL_CONVENTION_INFO_SUBCLASS_DECLARE_BEGIN(CCallConventionInfo)105 CALL_CONVENTION_INFO_SUBCLASS_DECLARE_BEGIN(CCallConventionInfo)
106 const std::vector<X64reg> intParmRegs {R7, R6, R2, R1, R8, R9};
107 const std::vector<X64reg> intReturnRegs {R0, R2};
108 const std::vector<X64reg> floatParmRegs {V0, V1, V2, V3, V4, V5, V6, V7};
109 const std::vector<X64reg> floatReturnRegs {V0, V1};
110 
111 int32 ClassifyAggregate(MIRType &mirType, uint64 sizeOfTy, std::vector<ArgumentClass> &classes) const;
112 CALL_CONVENTION_INFO_SUBCLASS_DECLARE_END
113 
CALL_CONVENTION_INFO_SUBCLASS_DECLARE_BEGIN(GHCCallConventionInfo)114 CALL_CONVENTION_INFO_SUBCLASS_DECLARE_BEGIN(GHCCallConventionInfo)
115 const std::vector<X64reg> intParmRegs {R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15};
116 const std::vector<X64reg> intReturnRegs {};
117 const std::vector<X64reg> floatParmRegs {};
118 const std::vector<X64reg> floatReturnRegs {};
119 CALL_CONVENTION_INFO_SUBCLASS_DECLARE_END
120 
121 class X64CallConvImpl {
122 public:
X64CallConvImpl(BECommon & be)123     X64CallConvImpl(BECommon &be) : beCommon(be)
124     {
125         convKind = GetCallConvKind(*(be.GetMIRModule().CurFunction()));
126     }
X64CallConvImpl(BECommon & be,CallConvKind convKind)127     X64CallConvImpl(BECommon &be, CallConvKind convKind) : beCommon(be), convKind(convKind) {}
128 
129     ~X64CallConvImpl() = default;
130 
GetCallConvInfo()131     const CallConventionInfo &GetCallConvInfo() const
132     {
133         return GetCallConvInfo(convKind);
134     }
135 
GetCallConvInfo(CallConvKind convKind_)136     static const CallConventionInfo &GetCallConvInfo(CallConvKind convKind_)
137     {
138         switch (convKind_) {
139             case kCCall:
140                 return CCallConventionInfo::GetCallConvInfo();
141             case kWebKitJS:
142                 return WebKitJSCallConventionInfo::GetCallConvInfo();
143             case kGHC:
144                 return GHCCallConventionInfo::GetCallConvInfo();
145             default:
146                 return CCallConventionInfo::GetCallConvInfo();
147         }
148     }
149 
GetCallConvKind(MIRFunction & mirFunction)150     static CallConvKind GetCallConvKind(MIRFunction &mirFunction)
151     {
152         if (mirFunction.GetAttr(FUNCATTR_ccall)) {
153             return kCCall;
154         } else if (mirFunction.GetAttr(FUNCATTR_webkitjscall)) {
155             return kWebKitJS;
156         } else if (mirFunction.GetAttr(FUNCATTR_ghcall)) {
157             return kGHC;
158         } else {
159             return kCCall;
160         }
161     }
162 
GetCallConvKind(StmtNode & node)163     static CallConvKind GetCallConvKind(StmtNode &node)
164     {
165         if (node.GetAttr(STMTATTR_ccall)) {
166             return kCCall;
167         } else if (node.GetAttr(STMTATTR_webkitjscall)) {
168             return kWebKitJS;
169         } else if (node.GetAttr(STMTATTR_ghcall)) {
170             return kGHC;
171         } else {
172             return kCCall;
173         }
174     }
175 
176     void InitCCLocInfo(CCLocInfo &pLoc) const;
177 
178     /* Passing  value related */
179     int32 LocateNextParm(MIRType &mirType, CCLocInfo &pLoc, bool isFirst = false, MIRFunction *func = nullptr);
180 
181     /*  return value related  */
182     int32 LocateRetVal(MIRType &retType, CCLocInfo &ploc);
183 
184 private:
AllocateGPParmRegister()185     X64reg AllocateGPParmRegister()
186     {
187         const std::vector<X64reg> &intParamRegs = GetCallConvInfo().GetIntParamRegs();
188         return (nextGeneralParmRegNO < intParamRegs.size()) ? intParamRegs[nextGeneralParmRegNO++] : kRinvalid;
189     }
190 
AllocateTwoGPParmRegisters(CCLocInfo & pLoc)191     void AllocateTwoGPParmRegisters(CCLocInfo &pLoc)
192     {
193         const std::vector<X64reg> &intParamRegs = GetCallConvInfo().GetIntParamRegs();
194         if ((nextGeneralParmRegNO + 1) < intParamRegs.size()) {
195             pLoc.reg0 = intParamRegs[nextGeneralParmRegNO++];
196             pLoc.reg1 = intParamRegs[nextGeneralParmRegNO++];
197         } else {
198             pLoc.reg0 = kRinvalid;
199         }
200     }
201 
AllocateSIMDFPRegister()202     X64reg AllocateSIMDFPRegister()
203     {
204         return (nextFloatRegNO < kNumFloatParmRegs) ? kFloatParmRegs[nextFloatRegNO++] : kRinvalid;
205     }
206 
AllocateGPReturnRegister()207     X64reg AllocateGPReturnRegister()
208     {
209         const std::vector<X64reg> &intReturnRegs = GetCallConvInfo().GetIntReturnRegs();
210         return (nextGeneralReturnRegNO < intReturnRegs.size()) ? intReturnRegs[nextGeneralReturnRegNO++] : kRinvalid;
211     }
212 
AllocateTwoGPReturnRegisters(CCLocInfo & pLoc)213     void AllocateTwoGPReturnRegisters(CCLocInfo &pLoc)
214     {
215         const std::vector<X64reg> &intReturnRegs = GetCallConvInfo().GetIntReturnRegs();
216         if ((nextGeneralReturnRegNO + 1) < intReturnRegs.size()) {
217             pLoc.reg0 = intReturnRegs[nextGeneralReturnRegNO++];
218             pLoc.reg1 = intReturnRegs[nextGeneralReturnRegNO++];
219         } else {
220             pLoc.reg0 = kRinvalid;
221         }
222     }
223 
AllocateSIMDFPReturnRegister()224     X64reg AllocateSIMDFPReturnRegister()
225     {
226         return (nextFloatRetRegNO < kNumFloatReturnRegs) ?
227                 kFloatReturnRegs[nextFloatRetRegNO++] : kRinvalid;
228     }
229 
230     BECommon &beCommon;
231     CallConvKind convKind = kCCall;
232     uint64 paramNum = 0;              /* number of all types of parameters processed so far */
233     uint32 nextGeneralParmRegNO = 0;   /* number of integer parameters processed so far */
234     uint32 nextGeneralReturnRegNO = 0; /* number of integer return processed so far */
235     uint32 nextStackArgAdress = 0;
236     uint32 nextFloatRegNO = 0;
237     uint32 nextFloatRetRegNO = 0;
238 };
239 } /* namespace maplebe */
240 
241 #endif /* MAPLEBE_INCLUDE_CG_X64_X64_CALL_CONV_H */
242