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Searched defs:reg (Results 1 – 25 of 177) sorted by relevance

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/arkcompiler/runtime_core/static_core/runtime/arch/
Dasm_support.h54 #define CFI_DEF_CFA(reg, offset) .cfi_def_cfa reg, (offset) argument
58 #define CFI_DEF_CFA_REGISTER(reg) .cfi_def_cfa_register reg argument
60 #define CFI_REL_OFFSET(reg, offset) .cfi_rel_offset reg, (offset) argument
62 #define CFI_OFFSET(reg, offset) .cfi_offset reg, (offset) argument
68 #define CFI_RESTORE(reg) .cfi_restore reg argument
70 #define CFI_REGISTER(reg, old_reg) .cfi_register reg, old_reg argument
79 #define CFI_DEF_CFA(reg, offset) argument
83 #define CFI_DEF_CFA_REGISTER(reg) argument
85 #define CFI_REL_OFFSET(reg, offset) argument
87 #define CFI_OFFSET(reg, offset) argument
[all …]
/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/regalloc/
Dreg_map.cpp26 for (size_t reg = priorityReg; reg < regMask.GetSize(); ++reg) { in SetMask() local
34 for (size_t reg = 0; reg < priorityReg; ++reg) { in SetMask() local
42 for (size_t reg = 0; reg < regMask.GetSize(); ++reg) { in SetMask() local
54 for (size_t reg = 0; reg < firstCalleeReg; ++reg) { in SetCallerFirstMask() local
61 for (size_t reg = lastCalleeReg + 1; reg < regMask.GetSize(); ++reg) { in SetCallerFirstMask() local
69 for (size_t reg = firstCalleeReg; reg <= lastCalleeReg; ++reg) { in SetCallerFirstMask() local
77 for (size_t reg = 0; reg < regMask.GetSize(); ++reg) { in SetCallerFirstMask() local
94 bool RegisterMap::IsRegAvailable(Register reg, Arch arch) const in IsRegAvailable()
/arkcompiler/runtime_core/compiler/optimizer/optimizations/regalloc/
Dreg_map.cpp26 for (size_t reg = priority_reg; reg < reg_mask.GetSize(); ++reg) { in SetMask() local
34 for (size_t reg = 0; reg < priority_reg; ++reg) { in SetMask() local
42 for (size_t reg = 0; reg < reg_mask.GetSize(); ++reg) { in SetMask() local
54 for (size_t reg = 0; reg < first_callee_reg; ++reg) { in SetCallerFirstMask() local
61 for (size_t reg = last_callee_reg + 1; reg < reg_mask.GetSize(); ++reg) { in SetCallerFirstMask() local
69 for (size_t reg = first_callee_reg; reg <= last_callee_reg; ++reg) { in SetCallerFirstMask() local
77 for (size_t reg = 0; reg < reg_mask.GetSize(); ++reg) { in SetCallerFirstMask() local
94 bool RegisterMap::IsRegAvailable(Register reg, Arch arch) const in IsRegAvailable()
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/x86_64/
Dasm_assembler.cpp572 void AsmAssembler::Mov(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) in Mov()
581 void AsmAssembler::Mov(InsnSize insnSize, const Mem &mem, Reg reg) in Mov()
590 void AsmAssembler::Mov(InsnSize insnSize, Reg reg, const Mem &mem) in Mov()
620 void AsmAssembler::MovF(const Mem &mem, Reg reg, bool isSingle) in MovF()
631 void AsmAssembler::MovF(Reg reg, const Mem &mem, bool isSingle) in MovF()
643 void AsmAssembler::Movabs(const ImmOpnd &immOpnd, Reg reg) in Movabs()
651 void AsmAssembler::Movabs(int64 symIdx, Reg reg) in Movabs()
660 void AsmAssembler::Push(InsnSize insnSize, Reg reg) in Push()
670 void AsmAssembler::Pop(InsnSize insnSize, Reg reg) in Pop()
680 void AsmAssembler::Lea(InsnSize insnSize, const Mem &mem, Reg reg) in Lea()
[all …]
Delf_assembler.cpp321 void ElfAssembler::OpReg(Reg reg, uint8 opCode1, uint8 opCode2, uint8 modReg) in OpReg()
417 void ElfAssembler::OpRM(Reg reg, const Mem &mem, uint8 opCode1, uint8 opCode2, bool extInsn) in OpRM()
441 void ElfAssembler::OpImmAndReg(const ImmOpnd &immOpnd, Reg reg, uint8 opCode, uint8 modReg) in OpImmAndReg()
505 void ElfAssembler::MovRegAndDisp(Reg reg, const Mem &mem, uint8 opCode) in MovRegAndDisp()
533 void ElfAssembler::OpPushPop(Reg reg, uint8 code) in OpPushPop()
1274 void ElfAssembler::Mov(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) in Mov()
1302 void ElfAssembler::Mov(InsnSize insnSize, const Mem &mem, Reg reg) in Mov()
1311 void ElfAssembler::Mov(InsnSize insnSize, Reg reg, const Mem &mem) in Mov()
1357 void ElfAssembler::MovF(const Mem &mem, Reg reg, bool isSingle) in MovF()
1367 void ElfAssembler::MovF(Reg reg, const Mem &mem, bool isSingle) in MovF()
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/arkcompiler/runtime_core/static_core/runtime/tests/
Dstack_walker_test.cpp111 int32_t ToCalleeRegister(size_t reg) in ToCalleeRegister()
117 int32_t ToCalleeFpRegister(size_t reg) in ToCalleeFpRegister()
174 … success = walker.IterateVRegsWithInfo([&wasSet, &walker](const auto &regInfo, const auto &reg) { in TEST_F()
187 success = walker.IterateVRegsWithInfo([&walker](const auto &regInfo, const auto &reg) { in TEST_F()
198 success = walker.IterateVRegsWithInfo([&walker](const auto &regInfo, const auto &reg) { in TEST_F()
208 success = walker.IterateVRegsWithInfo([](const auto &regInfo, const auto &reg) { in TEST_F()
218 success = walker.IterateVRegsWithInfo([](const auto &regInfo, const auto &reg) { in TEST_F()
228 success = walker.IterateVRegsWithInfo([](const auto &regInfo, const auto &reg) { in TEST_F()
349 …ss = walker.IterateVRegsWithInfo([&regIndex, &walker, &obj](const auto &regInfo, const auto &reg) { in TestModifyManyVregs()
371 … success = walker.IterateVRegsWithInfo([&regIndex, &obj](const auto &regInfo, const auto &reg) { in TestModifyManyVregs()
/arkcompiler/runtime_core/static_core/runtime/fibers/arch/aarch64/
Dswitch.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dupdate.S32 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
33 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dget.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
/arkcompiler/runtime_core/static_core/runtime/fibers/arch/amd64/
Dswitch.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dupdate.S33 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
34 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dget.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
/arkcompiler/runtime_core/static_core/runtime/fibers/arch/arm/
Dget.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dupdate.S32 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
33 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
Dswitch.S19 #define GPR_O(reg) FCTX_GPR_OFFSET_BYTES_ ## reg argument
20 #define FP_O(reg) FCTX_FP_OFFSET_BYTES_ ## reg argument
/arkcompiler/runtime_core/compiler/tests/aarch64/
Dregister64_test.cpp73 for (auto reg : regs) { in TEST_F() local
85 for (auto reg : regs) { in TEST_F() local
91 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/static_core/compiler/tests/aarch64/
Dregister64_test.cpp78 for (auto reg : regs) { in TEST_F() local
90 for (auto reg : regs) { in TEST_F() local
96 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/compiler/tests/aarch32/
Dregister32_test.cpp76 for (auto reg : regs) { in TEST_F() local
88 for (auto reg : regs) { in TEST_F() local
94 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/static_core/compiler/tests/aarch32/
Dregister32_test.cpp81 for (auto reg : regs) { in TEST_F() local
93 for (auto reg : regs) { in TEST_F() local
99 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/static_core/compiler/tests/amd64/
Dregister64_test.cpp81 for (auto reg : regs) { in TEST_F() local
93 for (auto reg : regs) { in TEST_F() local
99 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/runtime_core/compiler/tests/amd64/
Dregister64_test.cpp76 for (auto reg : regs) { in TEST_F() local
88 for (auto reg : regs) { in TEST_F() local
94 ScopedTmpRegRef reg(&encoder); in TEST_F() local
/arkcompiler/ets_runtime/ecmascript/compiler/assembler/x64/
Dassembler_x64.h181 void EmitRexPrefix(Register reg, Register rm) in EmitRexPrefix()
188 void EmitRexPrefixl(Register reg, Register rm) in EmitRexPrefixl()
197 void EmitRexPrefix(Register reg, Operand rm) in EmitRexPrefix()
204 void EmitRexPrefixl(Register reg, Operand rm) in EmitRexPrefixl()
216 void EmitModrm(int32_t reg, Register rm) in EmitModrm()
221 void EmitModrm(Register reg, Register rm) in EmitModrm()
226 void EmitOperand(Register reg, Operand rm) in EmitOperand()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/
Dslow_path.h155 void SetTmpReg(Reg reg) in SetTmpReg()
174 void SetDstReg(Reg reg) in SetDstReg()
179 void SetAddrReg(Reg reg) in SetAddrReg()
210 void SetClassReg(Reg reg) in SetClassReg()
223 void SetMethodReg(Reg reg) in SetMethodReg()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/
Dtarget.h115 static inline vixl::aarch32::Register VixlReg(Reg reg) in VixlReg()
129 static inline vixl::aarch32::Register VixlRegU(Reg reg) in VixlRegU()
143 static inline vixl::aarch32::VRegister VixlVReg(Reg reg) in VixlVReg()
266 bool IsCalleeRegister(Reg reg) override in IsCalleeRegister()
278 bool IsZeroReg([[maybe_unused]] Reg reg) const override in IsZeroReg()
565 auto reg = GetMasm()->GetScratchVRegisterList()->GetFirstAvailableSRegister(); in AcquireScratchRegister() local
579 auto reg = GetMasm()->GetScratchRegisterList()->GetFirstAvailableRegister(); in AcquireScratchRegister() local
585 void AcquireScratchRegister(Reg reg) override in AcquireScratchRegister()
599 void ReleaseScratchRegister(Reg reg) override in ReleaseScratchRegister()
611 bool IsScratchRegisterReleased(Reg reg) override in IsScratchRegisterReleased()
[all …]
/arkcompiler/runtime_core/static_core/compiler/optimizer/analysis/
Dreg_alloc_verifier.h172 LocationState &GetReg(Register reg) in GetReg()
177 const LocationState &GetReg(Register reg) const in GetReg()
182 LocationState &GetVReg(Register reg) in GetVReg()
187 const LocationState &GetVReg(Register reg) const in GetVReg()

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