1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #ifndef H_ETNAVIV_ASM
28 #define H_ETNAVIV_ASM
29
30 #include <stdint.h>
31 #include <stdbool.h>
32 #include "util/u_math.h"
33 #include "hw/isa.xml.h"
34
35 /* Size of an instruction in 32-bit words */
36 #define ETNA_INST_SIZE (4)
37 /* Number of source operands per instruction */
38 #define ETNA_NUM_SRC (3)
39
40 /* Broadcast swizzle to all four components */
41 #define INST_SWIZ_BROADCAST(x) \
42 (INST_SWIZ_X(x) | INST_SWIZ_Y(x) | INST_SWIZ_Z(x) | INST_SWIZ_W(x))
43 /* Identity (NOP) swizzle */
44 #define INST_SWIZ_IDENTITY \
45 (INST_SWIZ_X(0) | INST_SWIZ_Y(1) | INST_SWIZ_Z(2) | INST_SWIZ_W(3))
46 /* Fully specified swizzle */
47 #define INST_SWIZ(x,y,z,w) \
48 (INST_SWIZ_X(x) | INST_SWIZ_Y(y) | INST_SWIZ_Z(z) | INST_SWIZ_W(w))
49 #define SWIZZLE(c0,c1,c2,c3) \
50 INST_SWIZ(INST_SWIZ_COMP_##c0, \
51 INST_SWIZ_COMP_##c1, \
52 INST_SWIZ_COMP_##c2, \
53 INST_SWIZ_COMP_##c3)
54
55 /*** operands ***/
56
57 /* destination operand */
58 struct etna_inst_dst {
59 unsigned use:1; /* 0: not in use, 1: in use */
60 unsigned amode:3; /* INST_AMODE_* */
61 unsigned reg:7; /* register number 0..127 */
62 unsigned write_mask:4; /* INST_COMPS_* */
63 };
64
65 /* texture operand */
66 struct etna_inst_tex {
67 unsigned id:5; /* sampler id */
68 unsigned amode:3; /* INST_AMODE_* */
69 unsigned swiz:8; /* INST_SWIZ */
70 };
71
72 /* source operand */
73 struct etna_inst_src {
74 unsigned use:1; /* 0: not in use, 1: in use */
75 unsigned rgroup:3; /* INST_RGROUP_* */
76 union {
77 struct __attribute__((__packed__)) {
78 unsigned reg:9; /* register or uniform number 0..511 */
79 unsigned swiz:8; /* INST_SWIZ */
80 unsigned neg:1; /* negate (flip sign) if set */
81 unsigned abs:1; /* absolute (remove sign) if set */
82 unsigned amode:3; /* INST_AMODE_* */
83 };
84 struct __attribute__((__packed__)) {
85 unsigned imm_val : 20;
86 unsigned imm_type : 2;
87 };
88 };
89 };
90
91 /*** instruction ***/
92 struct etna_inst {
93 uint8_t opcode; /* INST_OPCODE_* */
94 uint8_t type; /* INST_TYPE_* */
95 unsigned cond:5; /* INST_CONDITION_* */
96 unsigned sat:1; /* saturate result between 0..1 */
97 unsigned sel_bit0:1; /* select low half mediump */
98 unsigned sel_bit1:1; /* select high half mediump */
99 unsigned dst_full:1; /* write to highp register */
100 unsigned no_oneconst_limit:1; /* allow multiple different uniform sources */
101 struct etna_inst_dst dst; /* destination operand */
102 struct etna_inst_tex tex; /* texture operand */
103 struct etna_inst_src src[ETNA_NUM_SRC]; /* source operand */
104 unsigned imm; /* takes place of src[2] for BRANCH/CALL */
105 };
106
107 /* Compose two swizzles (computes swz1.swz2) */
inst_swiz_compose(uint32_t swz1,uint32_t swz2)108 static inline uint32_t inst_swiz_compose(uint32_t swz1, uint32_t swz2)
109 {
110 return INST_SWIZ_X((swz1 >> (((swz2 >> 0)&3)*2))&3) |
111 INST_SWIZ_Y((swz1 >> (((swz2 >> 2)&3)*2))&3) |
112 INST_SWIZ_Z((swz1 >> (((swz2 >> 4)&3)*2))&3) |
113 INST_SWIZ_W((swz1 >> (((swz2 >> 6)&3)*2))&3);
114 };
115
116 /* Compose two write_masks (computes wm1.wm2) */
inst_write_mask_compose(uint32_t wm1,uint32_t wm2)117 static inline uint32_t inst_write_mask_compose(uint32_t wm1, uint32_t wm2)
118 {
119 unsigned wm = 0;
120 for (unsigned i = 0, j = 0; i < 4; i++) {
121 if (wm2 & (1 << i)) {
122 if (wm1 & (1 << j))
123 wm |= (1 << i);
124 j++;
125 }
126 }
127 return wm;
128 };
129
130 /* Return whether the rgroup is one of the uniforms */
131 static inline int
etna_rgroup_is_uniform(unsigned rgroup)132 etna_rgroup_is_uniform(unsigned rgroup)
133 {
134 return rgroup == INST_RGROUP_UNIFORM_0 ||
135 rgroup == INST_RGROUP_UNIFORM_1;
136 }
137
138 static inline struct etna_inst_src
etna_immediate_src(unsigned type,uint32_t bits)139 etna_immediate_src(unsigned type, uint32_t bits)
140 {
141 return (struct etna_inst_src) {
142 .use = 1,
143 .rgroup = INST_RGROUP_IMMEDIATE,
144 .imm_val = bits,
145 .imm_type = type
146 };
147 }
148
149 static inline struct etna_inst_src
etna_immediate_float(float x)150 etna_immediate_float(float x)
151 {
152 uint32_t bits = fui(x);
153 assert((bits & 0xfff) == 0); /* 12 lsb cut off */
154 return etna_immediate_src(0, bits >> 12);
155 }
156
157 static inline struct etna_inst_src
etna_immediate_int(int x)158 etna_immediate_int(int x)
159 {
160 assert(x >= -0x80000 && x < 0x80000); /* 20-bit signed int */
161 return etna_immediate_src(1, x);
162 }
163
164 /**
165 * Build vivante instruction from structure with
166 * opcode, cond, sat, dst_use, dst_amode,
167 * dst_reg, dst_comps, tex_id, tex_amode, tex_swiz,
168 * src[0-2]_reg, use, swiz, neg, abs, amode, rgroup,
169 * imm
170 *
171 * Return 0 if successful, and a non-zero
172 * value otherwise.
173 */
174 int
175 etna_assemble(uint32_t *out, const struct etna_inst *inst);
176
177 /**
178 * Set field imm of already-assembled instruction.
179 * This is used for filling in jump destinations in a separate pass.
180 */
181 static inline void
etna_assemble_set_imm(uint32_t * out,uint32_t imm)182 etna_assemble_set_imm(uint32_t *out, uint32_t imm)
183 {
184 out[3] |= VIV_ISA_WORD_3_SRC2_IMM(imm);
185 }
186
187 #endif
188