Searched defs:sshl (Results 1 – 3 of 3) sorted by relevance
/third_party/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1754 __ sshl(d1, d13, d9); in GenerateTestSequenceNEON() local 1755 __ sshl(v17.V16B(), v31.V16B(), v15.V16B()); in GenerateTestSequenceNEON() local 1756 __ sshl(v13.V2D(), v16.V2D(), v0.V2D()); in GenerateTestSequenceNEON() local 1757 __ sshl(v0.V2S(), v7.V2S(), v22.V2S()); in GenerateTestSequenceNEON() local 1758 __ sshl(v23.V4H(), v19.V4H(), v4.V4H()); in GenerateTestSequenceNEON() local 1759 __ sshl(v5.V4S(), v5.V4S(), v11.V4S()); in GenerateTestSequenceNEON() local 1760 __ sshl(v23.V8B(), v27.V8B(), v7.V8B()); in GenerateTestSequenceNEON() local 1761 __ sshl(v29.V8H(), v10.V8H(), v5.V8H()); in GenerateTestSequenceNEON() local
|
/third_party/node/deps/v8/src/execution/arm64/ |
D | simulator-logic-arm64.cc | 1544 LogicVRegister Simulator::sshl(VectorFormat vform, LogicVRegister dst, in sshl() function in v8::internal::Simulator
|
/third_party/vixl/src/aarch64/ |
D | logic-aarch64.cc | 1877 LogicVRegister Simulator::sshl(VectorFormat vform, in sshl() function in vixl::aarch64::Simulator
|