Searched defs:trn1 (Results 1 – 6 of 6) sorted by relevance
| /third_party/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2159 __ trn1(v19.V16B(), v24.V16B(), v12.V16B()); in GenerateTestSequenceNEON() local
2160 __ trn1(v2.V2D(), v7.V2D(), v10.V2D()); in GenerateTestSequenceNEON() local
2161 __ trn1(v22.V2S(), v0.V2S(), v21.V2S()); in GenerateTestSequenceNEON() local
2162 __ trn1(v12.V4H(), v15.V4H(), v20.V4H()); in GenerateTestSequenceNEON() local
2163 __ trn1(v30.V4S(), v17.V4S(), v9.V4S()); in GenerateTestSequenceNEON() local
2164 __ trn1(v12.V8B(), v19.V8B(), v29.V8B()); in GenerateTestSequenceNEON() local
2165 __ trn1(v23.V8H(), v8.V8H(), v9.V8H()); in GenerateTestSequenceNEON() local
|
| /third_party/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 5483 void Assembler::trn1(const PRegisterWithLaneSize& pd, in trn1() function in vixl::aarch64::Assembler
5597 void Assembler::trn1(const ZRegister& zd, in trn1() function in vixl::aarch64::Assembler
|
| D | assembler-aarch64.cc | 4877 void Assembler::trn1(const VRegister& vd, in trn1() function in vixl::aarch64::Assembler
|
| D | logic-aarch64.cc | 4312 LogicVRegister Simulator::trn1(VectorFormat vform, in trn1() function in vixl::aarch64::Simulator
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | assembler-arm64.cc | 1541 void Assembler::trn1(const VRegister& vd, const VRegister& vn, in trn1() function in v8::internal::Assembler
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-logic-arm64.cc | 2826 LogicVRegister Simulator::trn1(VectorFormat vform, LogicVRegister dst, in trn1() function in v8::internal::Simulator
|