| /third_party/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_bc_finalize.cpp | 516 unsigned vreg = v->gpr.sel(); in copy_fetch_src() local
623 unsigned vreg = v->gpr.sel(); in finalize_fetch() local
670 unsigned vreg = v->gpr.sel(); in finalize_fetch() local
747 unsigned vreg = v->gpr.sel(); in finalize_cf() local
799 unsigned vreg = v->gpr.sel(); in finalize_cf() local
833 unsigned vreg = v->gpr.sel(); in finalize_cf() local
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| /third_party/mesa3d/src/util/tests/ |
| D | register_allocate_test.cpp | 99 int vreg = next_vreg++; in TEST_F() local
108 int vreg = next_vreg++; in TEST_F() local
117 int vreg = next_vreg++; in TEST_F() local
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| /third_party/node/deps/v8/src/compiler/backend/ |
| D | spill-placer.cc | 205 int SpillPlacer::GetOrCreateIndexForLatestVreg(int vreg) { in GetOrCreateIndexForLatestVreg()
264 void SpillPlacer::SetSpillRequired(InstructionBlock* block, int vreg, in SetSpillRequired()
282 void SpillPlacer::SetDefinition(RpoNumber block, int vreg) { in SetDefinition()
465 void SpillPlacer::CommitSpill(int vreg, InstructionBlock* predecessor, in CommitSpill()
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| D | register-allocator-verifier.h | 98 bool IsAliasOf(int vreg) const { return aliases_.count(vreg) > 0; } in IsAliasOf()
99 void AddAlias(int vreg) { aliases_.insert(vreg); } in AddAlias()
251 void AddDelayedAssessment(InstructionOperand op, int vreg) { in AddDelayedAssessment()
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| D | spill-placer.h | 102 bool IsLatestVreg(int vreg) const { in IsLatestVreg()
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| D | instruction-selector-impl.h | 242 InstructionOperand DefineSameAsFirstForVreg(int vreg) { in DefineSameAsFirstForVreg()
246 InstructionOperand DefineAsRegistertForVreg(int vreg) { in DefineAsRegistertForVreg()
250 InstructionOperand UseRegisterForVreg(int vreg) { in UseRegisterForVreg()
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| D | instruction-scheduler.cc | 187 int32_t vreg = UnallocatedOperand::cast(input)->virtual_register(); in AddInstruction() local
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| D | register-allocator-verifier.cc | 172 int vreg = unallocated->virtual_register(); in BuildConstraint() local
608 int vreg = pair.second; in VerifyGapMoves() local
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| D | mid-tier-register-allocator.cc | 267 bool TryDeferSpillOutputUntilEntry(int vreg) { in TryDeferSpillOutputUntilEntry()
376 int vreg() const { return vreg_; } in vreg() function in v8::internal::compiler::VirtualRegisterData
3265 for (int vreg : data_->spilled_virtual_registers()) { in UpdateSpillRangesForLoops() local
3408 for (int vreg : data->spilled_virtual_registers()) { in AllocateSpillSlots() local
3473 for (int vreg : data->spilled_virtual_registers()) { in PopulateReferenceMaps() local
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| D | instruction-selector.cc | 328 int vreg = phi->operands()[i]; in UpdateRenamesInPhi() local
352 int vreg = unalloc->virtual_register(); in TryRename() local
360 int vreg = GetVirtualRegister(node); in SetRename() local
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| D | instruction.cc | 789 int vreg = (output->IsConstant()) in ValidateSSA() local
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| D | register-allocator.cc | 811 TopLevelLiveRange::TopLevelLiveRange(int vreg, MachineRepresentation rep) in TopLevelLiveRange()
2243 int vreg = unalloc->virtual_register(); in ProcessInstructions() local
4888 int vreg = *it; in ResolveControlFlow() local
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| D | register-allocator.h | 960 int vreg() const { return vreg_; } in vreg() function
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| /third_party/mesa3d/src/imagination/rogue/ |
| D | rogue_regalloc.c | 209 const uint32_t *vreg = entry->key; in rogue_ra_alloc() local
263 uint32_t vreg = *(uint32_t *)entry->key; in rogue_ra_alloc() local
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| D | rogue_operand.h | 134 } vreg; member
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| /third_party/node/deps/v8/src/codegen/x64/ |
| D | assembler-x64-inl.h | 188 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg, in emit_vex_prefix()
201 void Assembler::emit_vex_prefix(Register reg, Register vreg, Register rm, in emit_vex_prefix()
210 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg, Operand rm, in emit_vex_prefix()
223 void Assembler::emit_vex_prefix(Register reg, Register vreg, Operand rm, in emit_vex_prefix()
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| D | assembler-x64.cc | 3874 void Assembler::bmi1q(byte op, Register reg, Register vreg, Register rm) { in bmi1q()
3882 void Assembler::bmi1q(byte op, Register reg, Register vreg, Operand rm) { in bmi1q()
3890 void Assembler::bmi1l(byte op, Register reg, Register vreg, Register rm) { in bmi1l()
3898 void Assembler::bmi1l(byte op, Register reg, Register vreg, Operand rm) { in bmi1l()
4026 void Assembler::bmi2q(SIMDPrefix pp, byte op, Register reg, Register vreg, in bmi2q()
4035 void Assembler::bmi2q(SIMDPrefix pp, byte op, Register reg, Register vreg, in bmi2q()
4044 void Assembler::bmi2l(SIMDPrefix pp, byte op, Register reg, Register vreg, in bmi2l()
4053 void Assembler::bmi2l(SIMDPrefix pp, byte op, Register reg, Register vreg, in bmi2l()
4065 Register vreg = Register::from_code(0); // VEX.vvvv unused in rorxq() local
4076 Register vreg = Register::from_code(0); // VEX.vvvv unused in rorxq() local
[all …]
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| /third_party/node/deps/v8/src/compiler/ |
| D | graph-visualizer.cc | 722 int vreg = range->vreg(); in PrintLiveRangeChain() local
730 int vreg) { in PrintLiveRange()
1017 int vreg = top_level_live_range_json.range_.vreg(); in operator <<() local
1138 int vreg = ConstantOperand::cast(op)->virtual_register(); in operator <<() local
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| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-arm64.h | 1003 T vreg(unsigned code) const { in vreg() function
1013 inline SimVRegister& vreg(unsigned code) { return vregisters_[code]; } in vreg() function
1039 T vreg(unsigned size, unsigned code) const { in vreg() function
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| /third_party/vixl/test/aarch64/ |
| D | test-utils-aarch64.cc | 214 const VRegister& vreg) { in Equal128()
292 const VRegister& vreg) { in Equal64()
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_optimizer.cpp | 543 RegisterVec4& vreg; member in r600::ReplaceConstSource
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| D | sfn_valuefactory.cpp | 373 auto vreg = new Register( sel, chan, pin_channel); in dest() local
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| /third_party/node/deps/v8/src/codegen/ia32/ |
| D | assembler-ia32.cc | 3111 void Assembler::bmi1(byte op, Register reg, Register vreg, Operand rm) { in bmi1()
3146 void Assembler::bmi2(SIMDPrefix pp, byte op, Register reg, Register vreg, in bmi2()
3158 Register vreg = Register::from_code(0); // VEX.vvvv unused in rorx() local
3254 void Assembler::emit_vex_prefix(XMMRegister vreg, VectorLength l, SIMDPrefix pp, in emit_vex_prefix()
3267 void Assembler::emit_vex_prefix(Register vreg, VectorLength l, SIMDPrefix pp, in emit_vex_prefix()
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| /third_party/mesa3d/src/gallium/drivers/lima/ir/gp/ |
| D | gpir.h | 190 } vreg; member
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| /third_party/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 734 SimVRegister vreg) { in Simulator()
|