Searched defs:vrev64 (Results 1 – 5 of 5) sorted by relevance
/third_party/node/deps/v8/src/compiler/backend/arm/ |
D | code-generator-arm.cc | 3155 __ vrev64(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local 3159 __ vrev64(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local 3167 __ vrev64(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction() local
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/third_party/vixl/src/aarch32/ |
D | assembler-aarch32.h | 5538 void vrev64(DataType dt, DRegister rd, DRegister rm) { in vrev64() function 5543 void vrev64(DataType dt, QRegister rd, QRegister rm) { in vrev64() function
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D | assembler-aarch32.cc | 24105 void Assembler::vrev64(Condition cond, in vrev64() function in vixl::aarch32::Assembler 24135 void Assembler::vrev64(Condition cond, in vrev64() function in vixl::aarch32::Assembler
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D | disasm-aarch32.cc | 6127 void Disassembler::vrev64(Condition cond, in vrev64() function in vixl::aarch32::Disassembler 6136 void Disassembler::vrev64(Condition cond, in vrev64() function in vixl::aarch32::Disassembler
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/third_party/node/deps/v8/src/codegen/arm/ |
D | assembler-arm.cc | 5017 void Assembler::vrev64(NeonSize size, QwNeonRegister dst, QwNeonRegister src) { in vrev64() function in v8::internal::Assembler
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