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/kernel/linux/linux-5.10/drivers/phy/ti/
Dphy-j721e-wiz.c202 struct wiz { struct
229 static int wiz_reset(struct wiz *wiz) in wiz_reset() argument
233 ret = regmap_field_write(wiz->por_en, 0x1); in wiz_reset()
239 ret = regmap_field_write(wiz->por_en, 0x0); in wiz_reset()
246 static int wiz_mode_select(struct wiz *wiz) in wiz_mode_select() argument
248 u32 num_lanes = wiz->num_lanes; in wiz_mode_select()
254 if (wiz->lane_phy_type[i] == PHY_TYPE_DP) in wiz_mode_select()
259 ret = regmap_field_write(wiz->p_standard_mode[i], mode); in wiz_mode_select()
267 static int wiz_init_raw_interface(struct wiz *wiz, bool enable) in wiz_init_raw_interface() argument
269 u32 num_lanes = wiz->num_lanes; in wiz_init_raw_interface()
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DKconfig37 tristate "TI J721E WIZ (SERDES Wrapper) support"
46 This option enables support for WIZ module present in TI's J721E
47 SoC. WIZ is a serdes wrapper used to configure some of the input
DMakefile11 obj-$(CONFIG_PHY_J721E_WIZ) += phy-j721e-wiz.o
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dti,phy-j721e-wiz.yaml5 $id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#"
8 title: TI J721E WIZ (SERDES Wrapper)
16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
24 description: clock-specifier to represent input to the WIZ
80 WIZ node should have subnodes for each of the PLLs present in
105 WIZ node should have subnodes for each of the PMA common refclock
123 WIZ node should have subnode for refclk_dig to select the reference
151 WIZ node should have '1' subnode for the SERDES. It could be either
175 wiz@5000000 {
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/kernel/linux/linux-5.10/drivers/staging/clocking-wizard/
Ddt-binding.txt8 https://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v5_1/pg065-clk-wiz.pdf
/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-j721e-main.dtsi388 serdes_wiz0: wiz@5000000 {
389 compatible = "ti,j721e-wiz-16g";
445 serdes_wiz1: wiz@5010000 {
446 compatible = "ti,j721e-wiz-16g";
502 serdes_wiz2: wiz@5020000 {
503 compatible = "ti,j721e-wiz-16g";
559 serdes_wiz3: wiz@5030000 {
560 compatible = "ti,j721e-wiz-16g";
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Dintel_workarounds.c292 * Note that PS/WM thread counts depend on the WIZ hashing in gen8_ctx_workarounds_init()
803 * Note that PS/WM thread counts depend on the WIZ hashing in snb_gt_workarounds_init()
878 * Note that PS/WM thread counts depend on the WIZ hashing in ivb_gt_workarounds_init()
929 * Note that PS/WM thread counts depend on the WIZ hashing in vlv_gt_workarounds_init()
972 * Note that PS/WM thread counts depend on the WIZ hashing in hsw_gt_workarounds_init()
/kernel/linux/linux-5.10/kernel/
Dparams.c160 /* Args looks like "foo=bar,bar2 baz=fuz wiz". */
/kernel/linux/linux-5.10/arch/m68k/kernel/
Dhead.S1323 * It doesn't take a wiz kid to figure you want 1.A.
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_reg.h2783 /* Disables pipelining of read flushes past the SF-WIZ interface.