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1<?xml version="1.0" encoding="UTF-8"?>
2<!--
3Copyright © 2020 Google, Inc.
4
5Permission is hereby granted, free of charge, to any person obtaining a
6copy of this software and associated documentation files (the "Software"),
7to deal in the Software without restriction, including without limitation
8the rights to use, copy, modify, merge, publish, distribute, sublicense,
9and/or sell copies of the Software, and to permit persons to whom the
10Software is furnished to do so, subject to the following conditions:
11
12The above copyright notice and this permission notice (including the next
13paragraph) shall be included in all copies or substantial portions of the
14Software.
15
16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22SOFTWARE.
23 -->
24
25<isa>
26
27<!--
28	Cat5 Instructions: texture instructions
29 -->
30
31<bitset name="#cat5-s2en-bindless-base" size="1">
32	<doc>
33		The BASE field is actually split across BASE_LO and BASE_HI,
34		but '.baseN' should only appear in the bindless case.. the
35		easiest way to accomplish that is by splitting it out into a
36		bitset.  We just arbitrarily map this to BASE_LO
37	</doc>
38	<override>
39		<expr>{BINDLESS}</expr>
40		<display>
41			.base{BASE}
42		</display>
43	</override>
44	<display/>
45	<field name="BASE_LO" pos="0" type="uint"/>
46	<derived name="BASE" type="uint">
47		<expr>({BASE_HI} * 2) | {BASE_LO}</expr>
48	</derived>
49	<encode type="struct ir3_instruction *">
50		<map name="BASE_LO">src->cat5.tex_base &amp; 0x1</map>
51	</encode>
52</bitset>
53
54<bitset name="#instruction-cat5" extends="#instruction">
55	<doc>
56		The "normal" case, ie. not s2en (indirect) and/or bindless
57	</doc>
58	<display>
59		{SY}{JP}{NAME}{3D}{A}{O}{P}{S} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SAMP}{TEX}
60	</display>
61	<derived name="DST_HALF" expr="#type-half" type="bool" display="h"/>
62	<field name="FULL" pos="0" type="bool"/>
63	<derived name="HALF" expr="#multisrc-half" type="bool" display="h"/>
64	<field name="SRC1" low="1" high="8" type="#cat5-src1">
65		<param name="NUM_SRC"/>
66		<param name="HALF"/>
67	</field>
68	<field name="SRC2" low="9" high="16" type="#cat5-src2">
69		<param name="NUM_SRC"/>
70		<param name="HALF"/>
71		<param name="O"/>
72	</field>
73	<!--
74		TODO remainder of first 32b differ depending on s2en/bindless..
75		possibly use overrides?  Need to sort-out how to display..
76
77		Note b17 seems to show up in some blob traces (samgpN), need
78		to figure out what this bit does
79	 -->
80	<pattern low="17" high="18">0x</pattern>
81
82	<field name="SAMP" low="21" high="24" type="#cat5-samp">
83		<param name="HAS_SAMP"/>
84	</field>
85	<field name="TEX" low="25" high="31" type="#cat5-tex">
86		<param name="HAS_TEX"/>
87	</field>
88
89	<field name="DST" low="32" high="39" type="#reg-gpr"/>
90	<field name="WRMASK" low="40" high="43" type="#wrmask"/>
91	<field name="TYPE" low="44" high="46" type="#cat5-type">
92		<param name="HAS_TYPE"/>
93	</field>
94	<assert pos="47">0</assert>    <!-- BASE_LO -->
95	<field name="3D" pos="48" type="bool" display=".3d"/>
96	<field name="A" pos="49" type="bool" display=".a"/>
97	<field name="S" pos="50" type="bool" display=".s"/>
98	<field name="S2EN_BINDLESS" pos="51" type="bool"/>
99	<field name="O" pos="52" type="bool" display=".o"/>
100	<!-- OPC -->
101	<field name="JP" pos="59" type="bool" display="(jp)"/>
102	<field name="SY" pos="60" type="bool" display="(sy)"/>
103	<pattern low="61" high="63">101</pattern>  <!-- cat5 -->
104	<encode>
105		<map name="FULL">extract_cat5_FULL(src)</map>
106		<map name="TEX">src</map>
107		<map name="SAMP">src</map>
108		<map name="WRMASK">src->dsts[0]->wrmask</map>
109		<map name="BASE">src</map>
110		<map name="TYPE">src</map>
111		<map name="BASE_HI">src->cat5.tex_base >> 1</map>
112		<map name="3D">!!(src->flags &amp; IR3_INSTR_3D)</map>
113		<map name="A">!!(src->flags &amp; IR3_INSTR_A)</map>
114		<map name="S">!!(src->flags &amp; IR3_INSTR_S)</map>
115		<map name="S2EN_BINDLESS">!!(src->flags &amp; (IR3_INSTR_S2EN | IR3_INSTR_B))</map>
116		<map name="O">!!(src->flags &amp; IR3_INSTR_O)</map>
117		<map name="DESC_MODE">extract_cat5_DESC_MODE(src)</map>
118		<!--
119			TODO the src order is currently a bit messy due to ir3 using srcs[0]
120			for s2en src in the s2en case
121		 -->
122		<map name="SRC1">extract_cat5_SRC(src, 0)</map>
123		<map name="SRC2">extract_cat5_SRC(src, 1)</map>
124		<map name="SRC3">(src->srcs_count > 0) ? src->srcs[0] : NULL</map>
125	</encode>
126</bitset>
127
128<bitset name="#instruction-cat5-tex" extends="#instruction-cat5">
129	<override>
130		<expr>{S2EN_BINDLESS}</expr>
131		<doc>
132			The s2en (indirect) or bindless case
133		</doc>
134		<display>
135			{SY}{JP}{NAME}{3D}{A}{O}{P}{S}{S2EN}{UNIFORM}{NONUNIFORM}{BASE} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}{SRC3}{A1}
136		</display>
137		<field name="BASE_HI" low="19" high="20" type="uint"/>
138		<field name="SRC3" low="21" high="28" type="#cat5-src3">
139			<param name="BINDLESS"/>
140			<param name="DESC_MODE"/>
141			<param name="HAS_SAMP"/>
142			<param name="HAS_TEX"/>
143		</field>
144		<field name="DESC_MODE" low="29" high="31" type="#cat5-s2en-bindless-desc-mode"/>
145		<field name="BASE" pos="47" type="#cat5-s2en-bindless-base">
146			<param name="BINDLESS"/>
147			<param name="BASE_HI"/>
148		</field>
149		<derived name="BINDLESS" expr="#cat5-s2enb-is-bindless" type="bool"/>
150		<derived name="S2EN" expr="#cat5-s2enb-is-indirect" type="bool" display=".s2en"/>
151		<derived name="UNIFORM" expr="#cat5-s2enb-is-uniform" type="bool" display=".uniform"/>
152		<derived name="NONUNIFORM" expr="#cat5-s2enb-is-nonuniform" type="bool" display=".nonuniform"/>
153		<derived name="A1" expr="#cat5-s2enb-uses_a1" type="bool" display=", a1.x"/>
154	</override>
155
156	<assert low="19" high="20">00</assert>   <!-- BASE_HI -->
157	<field name="P" pos="53" type="bool" display=".p"/>
158
159	<encode>
160		<map name="P">!!(src->flags &amp; IR3_INSTR_P)</map>
161	</encode>
162</bitset>
163
164<bitset name="isam" extends="#instruction-cat5-tex">
165	<pattern low="54" high="58">00000</pattern>
166	<derived name="NUM_SRC" expr="#one" type="uint"/>
167	<derived name="HAS_SAMP" expr="#true" type="bool"/>
168	<derived name="HAS_TEX" expr="#true" type="bool"/>
169	<derived name="HAS_TYPE" expr="#true" type="bool"/>
170</bitset>
171
172<bitset name="isaml" extends="#instruction-cat5-tex">
173	<pattern low="54" high="58">00001</pattern>
174	<derived name="NUM_SRC" expr="#two" type="uint"/>
175	<derived name="HAS_SAMP" expr="#true" type="bool"/>
176	<derived name="HAS_TEX" expr="#true" type="bool"/>
177	<derived name="HAS_TYPE" expr="#true" type="bool"/>
178</bitset>
179
180<bitset name="isamm" extends="#instruction-cat5-tex">
181	<pattern low="54" high="58">00010</pattern>
182	<derived name="NUM_SRC" expr="#one" type="uint"/>
183	<derived name="HAS_SAMP" expr="#true" type="bool"/>
184	<derived name="HAS_TEX" expr="#true" type="bool"/>
185	<derived name="HAS_TYPE" expr="#true" type="bool"/>
186</bitset>
187
188<bitset name="sam" extends="#instruction-cat5-tex">
189	<pattern low="54" high="58">00011</pattern>
190	<derived name="NUM_SRC" expr="#one" type="uint"/>
191	<derived name="HAS_SAMP" expr="#true" type="bool"/>
192	<derived name="HAS_TEX" expr="#true" type="bool"/>
193	<derived name="HAS_TYPE" expr="#true" type="bool"/>
194</bitset>
195
196<bitset name="samb" extends="#instruction-cat5-tex">
197	<pattern low="54" high="58">00100</pattern>
198	<derived name="NUM_SRC" expr="#two" type="uint"/>
199	<derived name="HAS_SAMP" expr="#true" type="bool"/>
200	<derived name="HAS_TEX" expr="#true" type="bool"/>
201	<derived name="HAS_TYPE" expr="#true" type="bool"/>
202</bitset>
203
204<bitset name="saml" extends="#instruction-cat5-tex">
205	<pattern low="54" high="58">00101</pattern>
206	<derived name="NUM_SRC" expr="#two" type="uint"/>
207	<derived name="HAS_SAMP" expr="#true" type="bool"/>
208	<derived name="HAS_TEX" expr="#true" type="bool"/>
209	<derived name="HAS_TYPE" expr="#true" type="bool"/>
210</bitset>
211
212<bitset name="samgq" extends="#instruction-cat5-tex">
213	<pattern low="54" high="58">00110</pattern>
214	<derived name="NUM_SRC" expr="#one" type="uint"/>
215	<derived name="HAS_SAMP" expr="#true" type="bool"/>
216	<derived name="HAS_TEX" expr="#true" type="bool"/>
217	<derived name="HAS_TYPE" expr="#true" type="bool"/>
218</bitset>
219
220<bitset name="getlod" extends="#instruction-cat5-tex">
221	<pattern low="54" high="58">00111</pattern>
222	<derived name="NUM_SRC" expr="#one" type="uint"/>
223	<derived name="HAS_SAMP" expr="#true" type="bool"/>
224	<derived name="HAS_TEX" expr="#true" type="bool"/>
225	<derived name="HAS_TYPE" expr="#true" type="bool"/>
226</bitset>
227
228<bitset name="conv" extends="#instruction-cat5-tex">
229	<pattern low="54" high="58">01000</pattern>
230	<derived name="NUM_SRC" expr="#two" type="uint"/>
231	<derived name="HAS_SAMP" expr="#true" type="bool"/>
232	<derived name="HAS_TEX" expr="#true" type="bool"/>
233	<derived name="HAS_TYPE" expr="#true" type="bool"/>
234</bitset>
235
236<bitset name="convm" extends="#instruction-cat5-tex">
237	<pattern low="54" high="58">01001</pattern>
238	<derived name="NUM_SRC" expr="#two" type="uint"/>
239	<derived name="HAS_SAMP" expr="#true" type="bool"/>
240	<derived name="HAS_TEX" expr="#true" type="bool"/>
241	<derived name="HAS_TYPE" expr="#true" type="bool"/>
242</bitset>
243
244<bitset name="getsize" extends="#instruction-cat5-tex">
245	<pattern low="54" high="58">01010</pattern>
246	<derived name="NUM_SRC" expr="#one" type="uint"/>
247	<derived name="HAS_SAMP" expr="#false" type="bool"/>
248	<derived name="HAS_TEX" expr="#true" type="bool"/>
249	<derived name="HAS_TYPE" expr="#true" type="bool"/>
250</bitset>
251
252<bitset name="getbuf" extends="#instruction-cat5-tex">
253	<pattern low="54" high="58">01011</pattern>
254	<derived name="NUM_SRC" expr="#zero" type="uint"/>
255	<derived name="HAS_SAMP" expr="#false" type="bool"/>
256	<derived name="HAS_TEX" expr="#true" type="bool"/>
257	<derived name="HAS_TYPE" expr="#true" type="bool"/>
258</bitset>
259
260<bitset name="getpos" extends="#instruction-cat5-tex">
261	<pattern low="54" high="58">01100</pattern>
262	<derived name="NUM_SRC" expr="#one" type="uint"/>
263	<derived name="HAS_SAMP" expr="#false" type="bool"/>
264	<derived name="HAS_TEX" expr="#true" type="bool"/>
265	<derived name="HAS_TYPE" expr="#true" type="bool"/>
266</bitset>
267
268<bitset name="getinfo" extends="#instruction-cat5-tex">
269	<doc>
270		GETINFO returns 4 values, in .xyzw:
271
272		x: A value associated with the channel type, i.e. OpenCL's
273		   get_image_channel_data_type:
274
275		   The below was RE'd on A420 and confirmed with the
276		   blob's headers.
277
278		   8_SNORM:	     0 (CLK_SNORM_INT8)
279		   16_SNORM:	     1 (CLK_SNORM_INT16)
280		   8_UNORM:	     2 (CLK_UNORM_INT8)
281		   16_UNORM:	     3 (CLK_UNORM_INT16)
282		   5_6_5_UNORM:	     4 (CLK_UNORM_SHORT_565)
283		   5_5_5_1_UNORM:    5 (CLK_UNORM_SHORT_555)
284		   10_10_10_2_UNORM: 6 (CLK_UNORM_INT_101010, CLK_UNORM_SHORT_101010)
285		   8_SINT:	     7 (CLK_SIGNED_INT8)
286		   16_SINT:	     8 (CLK_SIGNED_INT16)
287		   32_SINT:	     9 (CLK_SIGNED_INT32)
288		   8_UINT:	    10 (CLK_UNSIGNED_INT8)
289		   16_UINT:	    11 (CLK_UNSIGNED_INT16)
290		   32_UINT:	    12 (CLK_UNSIGNED_INT32)
291		   16_FLOAT:	    13 (CLK_HALF_FLOAT)
292		   32_FLOAT:	    14 (CLK_FLOAT)
293		   9_9_9_E5_FLOAT:  15 (CLK_FLOAT_10F_11F_11F)
294		   11_11_10_FLOAT:  15 (CLK_FLOAT_10F_11F_11F)
295		   10_10_10_2_UINT: 16 (CLK_UNSIGNED_SHORT_101010)
296		   4_4_4_4_UNORM:   17 (CLK_UNORM_INT4)
297		   X8Z24_UNORM:	    18 (CLK_UNORM_INT32)
298
299		y: A value associated with the number of components
300		   and swizzle, i.e. OpenCL's get_image_channel_order:
301
302		   The below was largely taken from the blob's headers.
303
304		   A3xx/A4xx:
305
306		   0:  CLK_A
307		   1:  CLK_R
308		   2:  CLK_Rx
309		   3:  CLK_RG
310		   4:  CLK_RGx
311		   5:  CLK_RA
312		   6:  CLK_RGB
313		   7:  CLK_RGBx
314		   8:  CLK_RGBA
315		   9:  CLK_ARGB
316		   10: CLK_BGRA
317		   11: CLK_LUMINANCE
318		   12: CLK_INTENSITY
319		   13: CLK_ABGR
320		   14: CLK_BGR
321		   15: CLK_sRGB
322		   16: CLK_sRGBA
323		   17: CLK_DEPTH
324
325		   A5xx/A6xx:
326
327		   0:  CLK_A
328		   1:  CLK_R
329		   2:  CLK_RX
330		   3:  CLK_RG
331		   4:  CLK_RGX
332		   5:  CLK_RA
333		   6:  CLK_RGB
334		   7:  CLK_RGBX
335		   8:  CLK_RGBA
336		   9:  CLK_ARGB
337		   10: CLK_BGRA
338		   11: CLK_INTENSITY
339		   12: CLK_LUMINANCE
340		   13: CLK_ABGR
341		   14: CLK_DEPTH
342		   15: CLK_sRGB
343		   16: CLK_sRGBx
344		   17: CLK_sRGBA
345		   18: CLK_sBGRA
346		   19: CLK_sARGB
347		   20: CLK_sABGR
348		   21: CLK_BGR
349
350		z: Number of levels
351
352		w: Number of samples
353	</doc>
354	<pattern low="54" high="58">01101</pattern>
355	<derived name="NUM_SRC" expr="#zero" type="uint"/>
356	<derived name="HAS_SAMP" expr="#false" type="bool"/>
357	<derived name="HAS_TEX" expr="#true" type="bool"/>
358	<derived name="HAS_TYPE" expr="#true" type="bool"/>
359</bitset>
360
361<bitset name="dsx" extends="#instruction-cat5-tex">
362	<pattern low="54" high="58">01110</pattern>
363	<derived name="NUM_SRC" expr="#one" type="uint"/>
364	<derived name="HAS_SAMP" expr="#false" type="bool"/>
365	<derived name="HAS_TEX" expr="#false" type="bool"/>
366	<derived name="HAS_TYPE" expr="#true" type="bool"/>
367</bitset>
368
369<bitset name="dsy" extends="#instruction-cat5-tex">
370	<pattern low="54" high="58">01111</pattern>
371	<derived name="NUM_SRC" expr="#one" type="uint"/>
372	<derived name="HAS_SAMP" expr="#false" type="bool"/>
373	<derived name="HAS_TEX" expr="#false" type="bool"/>
374	<derived name="HAS_TYPE" expr="#true" type="bool"/>
375</bitset>
376
377<bitset name="gather4r" extends="#instruction-cat5-tex">
378	<pattern low="54" high="58">10000</pattern>
379	<derived name="NUM_SRC" expr="#one" type="uint"/>
380	<derived name="HAS_SAMP" expr="#true" type="bool"/>
381	<derived name="HAS_TEX" expr="#true" type="bool"/>
382	<derived name="HAS_TYPE" expr="#true" type="bool"/>
383</bitset>
384
385<bitset name="gather4g" extends="#instruction-cat5-tex">
386	<pattern low="54" high="58">10001</pattern>
387	<derived name="NUM_SRC" expr="#one" type="uint"/>
388	<derived name="HAS_SAMP" expr="#true" type="bool"/>
389	<derived name="HAS_TEX" expr="#true" type="bool"/>
390	<derived name="HAS_TYPE" expr="#true" type="bool"/>
391</bitset>
392
393<bitset name="gather4b" extends="#instruction-cat5-tex">
394	<pattern low="54" high="58">10010</pattern>
395	<derived name="NUM_SRC" expr="#one" type="uint"/>
396	<derived name="HAS_SAMP" expr="#true" type="bool"/>
397	<derived name="HAS_TEX" expr="#true" type="bool"/>
398	<derived name="HAS_TYPE" expr="#true" type="bool"/>
399</bitset>
400
401<bitset name="gather4a" extends="#instruction-cat5-tex">
402	<pattern low="54" high="58">10011</pattern>
403	<derived name="NUM_SRC" expr="#one" type="uint"/>
404	<derived name="HAS_SAMP" expr="#true" type="bool"/>
405	<derived name="HAS_TEX" expr="#true" type="bool"/>
406	<derived name="HAS_TYPE" expr="#true" type="bool"/>
407</bitset>
408
409<bitset name="samgp0" extends="#instruction-cat5-tex">
410	<pattern low="54" high="58">10100</pattern>
411	<derived name="NUM_SRC" expr="#one" type="uint"/>
412	<derived name="HAS_SAMP" expr="#true" type="bool"/>
413	<derived name="HAS_TEX" expr="#true" type="bool"/>
414	<derived name="HAS_TYPE" expr="#true" type="bool"/>
415</bitset>
416
417<bitset name="samgp1" extends="#instruction-cat5-tex">
418	<pattern low="54" high="58">10101</pattern>
419	<derived name="NUM_SRC" expr="#one" type="uint"/>
420	<derived name="HAS_SAMP" expr="#true" type="bool"/>
421	<derived name="HAS_TEX" expr="#true" type="bool"/>
422	<derived name="HAS_TYPE" expr="#true" type="bool"/>
423</bitset>
424
425<bitset name="samgp2" extends="#instruction-cat5-tex">
426	<pattern low="54" high="58">10110</pattern>
427	<derived name="NUM_SRC" expr="#one" type="uint"/>
428	<derived name="HAS_SAMP" expr="#true" type="bool"/>
429	<derived name="HAS_TEX" expr="#true" type="bool"/>
430	<derived name="HAS_TYPE" expr="#true" type="bool"/>
431</bitset>
432
433<bitset name="samgp3" extends="#instruction-cat5-tex">
434	<pattern low="54" high="58">10111</pattern>
435	<derived name="NUM_SRC" expr="#one" type="uint"/>
436	<derived name="HAS_SAMP" expr="#true" type="bool"/>
437	<derived name="HAS_TEX" expr="#true" type="bool"/>
438	<derived name="HAS_TYPE" expr="#true" type="bool"/>
439</bitset>
440
441<bitset name="dsxpp.1" extends="#instruction-cat5-tex">
442	<pattern low="54" high="58">11000</pattern>
443	<derived name="NUM_SRC" expr="#one" type="uint"/>
444	<derived name="HAS_SAMP" expr="#false" type="bool"/>
445	<derived name="HAS_TEX" expr="#false" type="bool"/>
446	<derived name="HAS_TYPE" expr="#false" type="bool"/>
447</bitset>
448
449<bitset name="dsypp.1" extends="#instruction-cat5-tex">
450	<pattern low="54" high="58">11001</pattern>
451	<derived name="NUM_SRC" expr="#one" type="uint"/>
452	<derived name="HAS_SAMP" expr="#false" type="bool"/>
453	<derived name="HAS_TEX" expr="#false" type="bool"/>
454	<derived name="HAS_TYPE" expr="#false" type="bool"/>
455</bitset>
456
457<bitset name="rgetpos" extends="#instruction-cat5-tex">
458	<pattern low="54" high="58">11010</pattern>
459	<derived name="NUM_SRC" expr="#one" type="uint"/>
460	<derived name="HAS_SAMP" expr="#false" type="bool"/>
461	<derived name="HAS_TEX" expr="#false" type="bool"/>
462	<derived name="HAS_TYPE" expr="#true" type="bool"/>
463</bitset>
464
465<bitset name="rgetinfo" extends="#instruction-cat5-tex">
466	<pattern low="54" high="58">11011</pattern>
467	<derived name="NUM_SRC" expr="#zero" type="uint"/>
468	<derived name="HAS_SAMP" expr="#false" type="bool"/>
469	<derived name="HAS_TEX" expr="#false" type="bool"/>
470	<derived name="HAS_TYPE" expr="#true" type="bool"/>
471</bitset>
472
473<bitset name="brcst.active" extends="#instruction-cat5">
474	<doc>
475		The subgroup is divided into (subgroup_size / CLUSTER_SIZE)
476		clusters. For each cluster brcst.active.w does:
477
478		Given a cluster of fibers f_0, f_1, ..., f_{CLUSTER_SIZE-1} brcst
479		broadcasts the SRC value from the fiber f_{CLUSTER_SIZE/2-1}
480		to fibers f_{CLUSTER_SIZE/2}, ..., f_{CLUSTER_SIZE-1}. The DST reg
481		in other fibers is unaffected. If fiber f_{CLUSTER_SIZE/2-1} is
482		inactive the value to broadcast is taken from lower fibers
483		f_{CLUSTER_SIZE/2-2}, f_{CLUSTER_SIZE/2-3}, ...
484		If all fibers f_0, f_1, ..., f_{CLUSTER_SIZE/2-1} are inactive
485		the DST reg remains unchanged for all fibers.
486
487		It is necessary in order to implement arithmetic subgroup
488		operations with prefix sum (https://en.wikipedia.org/wiki/Prefix_sum).
489
490		For brcst.active.w8 without inactive fibers:
491			Fiber      | 0  1  2  3  4  5  6  7  | 8  9  10  11  12  13  14  15
492			SRC        | s0 s1 s2 s3 ...      s7 | s8  ...   s11 ...         s15
493			DST_before | d0 d1       ...      d7 | d8  ...                   d15
494			DST_after  | d0 d1 d2 d3 s3 s3 s3 s3 | d8  ...   d11 s11 s11 s11 s11
495
496		If fibers 2 and 3 are inactive:
497			Fiber      | 0  1  X  X  4  5  6  7  | ...
498			SRC        | s0 s1 X  X  ...      s7 | ...
499			DST_before | d0 d1       ...      d7 | ...
500			DST_after  | d0 d1 X  X  s1 s1 s1 s1 | ...
501	</doc>
502
503	<gen min="600"/>
504
505	<display>
506		{SY}{JP}{NAME}.w{CLUSTER_SIZE} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}
507	</display>
508
509	<field name="W" low="19" high="20" type="uint"/>
510	<pattern low="53" high="58">111110</pattern> <!-- OPC -->
511
512	<derived name="CLUSTER_SIZE" type="uint">
513		<expr>
514			2 &lt;&lt; {W}
515		</expr>
516	</derived>
517	<derived name="NUM_SRC" expr="#one" type="uint"/>
518	<derived name="HAS_SAMP" expr="#false" type="bool"/>
519	<derived name="HAS_TEX" expr="#false" type="bool"/>
520	<derived name="HAS_TYPE" expr="#true" type="bool"/>
521
522	<encode>
523		<map name="W">util_logbase2(src->cat5.cluster_size) - 1</map>
524	</encode>
525</bitset>
526
527<bitset name="#instruction-cat5-quad-shuffle" extends="#instruction-cat5">
528	<gen min="600"/>
529
530	<display>
531		{SY}{JP}{NAME} {TYPE}({WRMASK}){DST_HALF}{DST}{SRC1}{SRC2}
532	</display>
533
534	<pattern low="53" high="58">111111</pattern> <!-- OPC -->
535
536	<derived name="HAS_SAMP" expr="#false" type="bool"/>
537	<derived name="HAS_TEX" expr="#false" type="bool"/>
538	<derived name="HAS_TYPE" expr="#true" type="bool"/>
539</bitset>
540
541<bitset name="quad_shuffle.brcst" extends="#instruction-cat5-quad-shuffle">
542	<doc>subgroupQuadBroadcast</doc>
543
544	<pattern low="19" high="20">00</pattern>   <!-- Quad-shuffle variant -->
545
546	<derived name="NUM_SRC" expr="#two" type="uint"/>
547</bitset>
548
549<bitset name="quad_shuffle.horiz" extends="#instruction-cat5-quad-shuffle">
550	<doc>subgroupQuadSwapHorizontal</doc>
551
552	<pattern low="19" high="20">01</pattern>   <!-- Quad-shuffle variant -->
553
554	<derived name="NUM_SRC" expr="#one" type="uint"/>
555</bitset>
556
557<bitset name="quad_shuffle.vert" extends="#instruction-cat5-quad-shuffle">
558	<doc>subgroupQuadSwapVertical</doc>
559
560	<pattern low="19" high="20">10</pattern>   <!-- Quad-shuffle variant -->
561
562	<derived name="NUM_SRC" expr="#one" type="uint"/>
563</bitset>
564
565<bitset name="quad_shuffle.diag" extends="#instruction-cat5-quad-shuffle">
566	<doc>subgroupQuadSwapDiagonal</doc>
567
568	<pattern low="19" high="20">11</pattern>   <!-- Quad-shuffle variant -->
569
570	<derived name="NUM_SRC" expr="#one" type="uint"/>
571</bitset>
572
573<!--
574	All the magic for conditionally displaying various srcs, etc
575	for the non-bindless / non-indirect case, or things that are in
576	common with the bindless / indirect case
577 -->
578
579<bitset name="#cat5-src1" size="8">
580	<override>
581		<expr>{NUM_SRC} > 0</expr>
582		<display>
583			, {HALF}{SRC}
584		</display>
585		<field name="SRC" low="0" high="7" type="#reg-gpr"/>
586	</override>
587	<display/>
588	<assert low="0" high="7">00000000</assert>
589	<encode type="struct ir3_register *">
590		<map name="SRC">src</map>
591	</encode>
592</bitset>
593
594<bitset name="#cat5-src2" size="8">
595	<override>
596		<expr>{O} || ({NUM_SRC} > 1)</expr>
597		<display>
598			, {HALF}{SRC}
599		</display>
600		<field name="SRC" low="0" high="7" type="#reg-gpr"/>
601	</override>
602	<display/>
603	<assert low="0" high="7">00000000</assert>
604	<encode type="struct ir3_register *">
605		<map name="SRC">src</map>
606	</encode>
607</bitset>
608
609<bitset name="#cat5-samp" size="4">
610	<override>
611		<expr>{HAS_SAMP}</expr>
612		<display>
613			, s#{SAMP}
614		</display>
615		<field name="SAMP" low="0" high="3" type="uint"/>
616	</override>
617	<display/>
618	<assert low="0" high="3">0000</assert>
619	<encode type="struct ir3_instruction *">
620		<map name="SAMP">src->cat5.samp</map>
621	</encode>
622</bitset>
623
624<bitset name="#cat5-samp-s2en-bindless-a1" size="8">
625	<doc>s2en (indirect) / bindless case with a1.x has 8b samp</doc>
626	<override>
627		<expr>{HAS_SAMP}</expr>
628		<display>
629			, s#{SAMP}
630		</display>
631		<field name="SAMP" low="0" high="7" type="uint"/>
632	</override>
633	<display/>
634	<assert low="0" high="7">00000000</assert>
635	<encode type="struct ir3_instruction *">
636		<map name="SAMP">src->cat5.samp</map>
637	</encode>
638</bitset>
639
640<bitset name="#cat5-tex" size="7">
641	<override>
642		<expr>{HAS_TEX}</expr>
643		<display>
644			, t#{TEX}
645		</display>
646		<field name="TEX" low="0" high="6" type="uint"/>
647	</override>
648	<display/>
649	<assert low="0" high="6">0000000</assert>
650	<encode type="struct ir3_instruction *">
651		<map name="TEX">src->cat5.tex</map>
652	</encode>
653</bitset>
654
655<bitset name="#cat5-tex-s2en-bindless" size="4">
656	<doc>s2en (indirect) / bindless case only has 4b tex</doc>
657	<override>
658		<expr>{HAS_TEX}</expr>
659		<display>
660			, t#{TEX}
661		</display>
662		<field name="TEX" low="0" high="3" type="uint"/>
663	</override>
664	<display/>
665	<assert low="0" high="3">0000</assert>
666	<encode type="struct ir3_instruction *">
667		<map name="TEX">src->cat5.tex</map>
668	</encode>
669</bitset>
670
671<bitset name="#cat5-type" size="3">
672	<display/>
673	<override>
674		<expr>{HAS_TYPE}</expr>
675		<display>
676			({TYPE})
677		</display>
678	</override>
679	<field name="TYPE" low="0" high="2" type="#type"/>
680	<encode type="struct ir3_instruction *">
681		<!--
682			Normally we only encode fields that have visible impact on
683			the decoded disasm, but the type field is one of those
684			special exceptions
685		 -->
686		<map name="TYPE" force="true">src->cat5.type</map>
687	</encode>
688</bitset>
689
690<!--
691	Helpers/bitsets/etc for dealing with the bindless/indirect case:
692 -->
693
694<enum name="#cat5-s2en-bindless-desc-mode">
695	<doc>
696		We don't actually display this enum, but it is useful to
697		document the various cases
698
699		TODO we should probably have an option for uniforms w/out
700		display strings, but which have 'C' names that can be used
701		to generate header that the compiler can use
702	</doc>
703	<value val="0" display="CAT5_UNIFORM">
704		<doc>
705			Use traditional GL binding model, get texture and sampler index
706			from src3 which is presumed to be uniform on a4xx+ (a3xx doesn't
707			have the other modes, but does handle non-uniform indexing).
708		</doc>
709	</value>
710	<value val="1" display="CAT5_BINDLESS_A1_UNIFORM">
711		<doc>
712			The sampler base comes from the low 3 bits of a1.x, and the sampler
713			and texture index come from src3 which is presumed to be uniform.
714		</doc>
715	</value>
716	<value val="2" display="CAT5_BINDLESS_NONUNIFORM">
717		<doc>
718			The texture and sampler share the same base, and the sampler and
719			texture index come from src3 which is *not* presumed to be uniform.
720		</doc>
721	</value>
722	<value val="3" display="CAT5_BINDLESS_A1_NONUNIFORM">
723		<doc>
724			The sampler base comes from the low 3 bits of a1.x, and the sampler
725			and texture index come from src3 which is *not* presumed to be
726			uniform.
727		</doc>
728	</value>
729	<value val="4" display="CAT5_NONUNIFORM">
730		<doc>
731			Use traditional GL binding model, get texture and sampler index
732			from src3 which is *not* presumed to be uniform.
733		</doc>
734	</value>
735	<value val="5" display="CAT5_BINDLESS_UNIFORM">
736		<doc>
737			The texture and sampler share the same base, and the sampler and
738			texture index come from src3 which is presumed to be uniform.
739		</doc>
740	</value>
741	<value val="6" display="CAT5_BINDLESS_IMM">
742		<doc>
743			The texture and sampler share the same base, get sampler index from low
744			4 bits of src3 and texture index from high 4 bits.
745		</doc>
746	</value>
747	<value val="7" display="CAT5_BINDLESS_A1_IMM">
748		<doc>
749			The sampler base comes from the low 3 bits of a1.x, and the texture
750			index comes from the next 8 bits of a1.x. The sampler index is an
751			immediate in src3.
752		</doc>
753	</value>
754</enum>
755
756<!-- Helper to map s2en/bindless DESC_MODE to whether it is an indirect mode -->
757<expr name="#cat5-s2enb-is-indirect">
758	{DESC_MODE} &lt; 6  /* CAT5_BINDLESS_IMM */
759</expr>
760
761<!-- Helper to map s2en/bindless DESC_MODE to whether it is a bindless mode -->
762<expr name="#cat5-s2enb-is-bindless">
763	({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ ||
764	({DESC_MODE} == 2) /* CAT5_BINDLESS_NONUNIFORM */ ||
765	({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ ||
766	({DESC_MODE} == 5) /* CAT5_BINDLESS_UNIFORM */ ||
767	({DESC_MODE} == 6) /* CAT5_BINDLESS_IMM */ ||
768	({DESC_MODE} == 7) /* CAT5_BINDLESS_A1_IMM */
769</expr>
770
771<!-- Helper to map s2en/bindless DESC_MODE to whether it uses a1.x -->
772<expr name="#cat5-s2enb-uses_a1">
773	({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ ||
774	({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ ||
775	({DESC_MODE} == 7) /* CAT5_BINDLESS_A1_IMM */
776</expr>
777
778<!-- Helper to map s2en/bindless DESC_MODE to whether it is uniform (flow control) mode -->
779<expr name="#cat5-s2enb-is-uniform">
780	({DESC_MODE} == 0) /* CAT5_UNIFORM */ ||
781	({DESC_MODE} == 1) /* CAT5_BINDLESS_A1_UNIFORM */ ||
782	({DESC_MODE} == 5) /* CAT5_BINDLESS_UNIFORM */
783</expr>
784
785<!-- Helper to map s2en/bindless DESC_MODE to whether it is non-uniform mode. -->
786<expr name="#cat5-s2enb-is-nonuniform">
787	({DESC_MODE} == 2) /* CAT5_BINDLESS_NONUNIFORM */ ||
788	({DESC_MODE} == 3) /* CAT5_BINDLESS_A1_NONUNIFORM */ ||
789	({DESC_MODE} == 4) /* CAT5_NONUNIFORM */
790</expr>
791
792<bitset name="#cat5-src3" size="8">
793	<doc>bindless/indirect src3, which can either be GPR or samp/tex</doc>
794	<override expr="#cat5-s2enb-is-indirect">
795		<display>
796			, {SRC_HALF}{SRC}
797		</display>
798		<field name="SRC" low="0" high="7" type="#reg-gpr"/>
799		<derived name="SRC_HALF" type="bool" display="h">
800			<expr>!{BINDLESS}</expr>
801		</derived>
802	</override>
803	<override expr="#cat5-s2enb-uses_a1">
804		<doc>
805			In the case that a1.x is used, all 8 bits encode sampler
806		</doc>
807		<display>
808			{SAMP}
809		</display>
810		<field name="SAMP" low="0" high="7" type="#cat5-samp-s2en-bindless-a1">
811			<param name="HAS_SAMP"/>
812		</field>
813	</override>
814	<display>
815		{SAMP}{TEX}
816	</display>
817	<field name="SAMP" low="0" high="3" type="#cat5-samp">
818		<param name="HAS_SAMP"/>
819	</field>
820	<field name="TEX" low="4" high="7" type="#cat5-tex-s2en-bindless">
821		<param name="HAS_TEX"/>
822	</field>
823	<encode type="struct ir3_register *">
824		<map name="SAMP">s->instr</map>
825		<map name="TEX">s->instr</map>
826		<map name="SRC">src</map>
827	</encode>
828</bitset>
829
830</isa>
831