1 /*
2 * Copyright(c) 2016 Intel Corporation.
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47
48 #ifndef HFI1_SDMA_TXREQ_H
49 #define HFI1_SDMA_TXREQ_H
50
51 /* increased for AHG */
52 #define NUM_DESC 6
53
54 /*
55 * struct sdma_desc - canonical fragment descriptor
56 *
57 * This is the descriptor carried in the tx request
58 * corresponding to each fragment.
59 *
60 */
61 struct sdma_desc {
62 /* private: don't use directly */
63 u64 qw[2];
64 void *pinning_ctx;
65 };
66
67 /**
68 * struct sdma_txreq - the sdma_txreq structure (one per packet)
69 * @list: for use by user and by queuing for wait
70 *
71 * This is the representation of a packet which consists of some
72 * number of fragments. Storage is provided to within the structure.
73 * for all fragments.
74 *
75 * The storage for the descriptors are automatically extended as needed
76 * when the currently allocation is exceeded.
77 *
78 * The user (Verbs or PSM) may overload this structure with fields
79 * specific to their use by putting this struct first in their struct.
80 * The method of allocation of the overloaded structure is user dependent
81 *
82 * The list is the only public field in the structure.
83 *
84 */
85
86 #define SDMA_TXREQ_S_OK 0
87 #define SDMA_TXREQ_S_SENDERROR 1
88 #define SDMA_TXREQ_S_ABORTED 2
89 #define SDMA_TXREQ_S_SHUTDOWN 3
90
91 /* flags bits */
92 #define SDMA_TXREQ_F_URGENT 0x0001
93 #define SDMA_TXREQ_F_AHG_COPY 0x0002
94 #define SDMA_TXREQ_F_USE_AHG 0x0004
95 #define SDMA_TXREQ_F_VIP 0x0010
96
97 struct sdma_txreq;
98 typedef void (*callback_t)(struct sdma_txreq *, int);
99
100 struct iowait;
101 struct sdma_txreq {
102 struct list_head list;
103 /* private: */
104 struct sdma_desc *descp;
105 /* private: */
106 void *coalesce_buf;
107 /* private: */
108 struct iowait *wait;
109 /* private: */
110 callback_t complete;
111 #ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER
112 u64 sn;
113 #endif
114 /* private: - used in coalesce/pad processing */
115 u16 packet_len;
116 /* private: - down-counted to trigger last */
117 u16 tlen;
118 /* private: */
119 u16 num_desc;
120 /* private: */
121 u16 desc_limit;
122 /* private: */
123 u16 next_descq_idx;
124 /* private: */
125 u16 coalesce_idx;
126 /* private: flags */
127 u16 flags;
128 /* private: */
129 struct sdma_desc descs[NUM_DESC];
130 };
131
sdma_txreq_built(struct sdma_txreq * tx)132 static inline int sdma_txreq_built(struct sdma_txreq *tx)
133 {
134 return tx->num_desc;
135 }
136
137 #endif /* HFI1_SDMA_TXREQ_H */
138