Searched refs:I915_READ (Results 1 – 5 of 5) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
D | i915_debugfs.c | 400 I915_READ(GEN8_DE_PIPE_IMR(pipe))); in gen8_display_interrupt_info() 403 I915_READ(GEN8_DE_PIPE_IIR(pipe))); in gen8_display_interrupt_info() 406 I915_READ(GEN8_DE_PIPE_IER(pipe))); in gen8_display_interrupt_info() 412 I915_READ(GEN8_DE_PORT_IMR)); in gen8_display_interrupt_info() 414 I915_READ(GEN8_DE_PORT_IIR)); in gen8_display_interrupt_info() 416 I915_READ(GEN8_DE_PORT_IER)); in gen8_display_interrupt_info() 419 I915_READ(GEN8_DE_MISC_IMR)); in gen8_display_interrupt_info() 421 I915_READ(GEN8_DE_MISC_IIR)); in gen8_display_interrupt_info() 423 I915_READ(GEN8_DE_MISC_IER)); in gen8_display_interrupt_info() 426 I915_READ(GEN8_PCU_IMR)); in gen8_display_interrupt_info() [all …]
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D | i915_suspend.c | 41 dev_priv->regfile.saveDSPARB = I915_READ(DSPARB); in i915_save_display() 77 dev_priv->regfile.saveSWF0[i] = I915_READ(SWF0(i)); in i915_save_state() 78 dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i)); in i915_save_state() 81 dev_priv->regfile.saveSWF3[i] = I915_READ(SWF3(i)); in i915_save_state() 84 dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i)); in i915_save_state() 87 dev_priv->regfile.saveSWF0[i] = I915_READ(SWF0(i)); in i915_save_state() 88 dev_priv->regfile.saveSWF1[i] = I915_READ(SWF1(i)); in i915_save_state() 91 dev_priv->regfile.saveSWF3[i] = I915_READ(SWF3(i)); in i915_save_state()
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D | i915_irq.c | 300 val = I915_READ(PORT_HOTPLUG_EN); in i915_hotplug_interrupt_update_locked() 377 old_val = I915_READ(GEN8_DE_PORT_IMR); in bdw_update_port_irq() 431 u32 sdeimr = I915_READ(SDEIMR); in ibx_display_interrupt_update() 687 return I915_READ(PIPE_FRMCOUNT_G4X(pipe)); in g4x_get_vblank_counter() 976 misccpctl = I915_READ(GEN7_MISCCPCTL); in ivb_parity_work() 992 error_status = I915_READ(reg); in ivb_parity_work() 1253 I915_READ(PIPE_CRC_RES_1_IVB(pipe)), in hsw_pipe_crc_irq_handler() 1261 I915_READ(PIPE_CRC_RES_1_IVB(pipe)), in ivb_pipe_crc_irq_handler() 1262 I915_READ(PIPE_CRC_RES_2_IVB(pipe)), in ivb_pipe_crc_irq_handler() 1263 I915_READ(PIPE_CRC_RES_3_IVB(pipe)), in ivb_pipe_crc_irq_handler() [all …]
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D | intel_pm.c | 85 I915_READ(CHICKEN_PAR1_1) | in gen9_init_clock_gating() 91 I915_READ(CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP); in gen9_init_clock_gating() 95 I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM); in gen9_init_clock_gating() 101 I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | in gen9_init_clock_gating() 110 I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | in bxt_init_clock_gating() 117 I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | in bxt_init_clock_gating() 124 I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) | in bxt_init_clock_gating() 139 I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | in bxt_init_clock_gating() 146 I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | in bxt_init_clock_gating() 159 I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) | in glk_init_clock_gating() [all …]
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D | i915_drv.h | 1972 #define I915_READ(reg__) __I915_REG_OP(read, dev_priv, (reg__)) macro
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