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Searched refs:IS_GEN9_BC (Results 1 – 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Ddebugfs_gt_pm.c438 max_freq *= (IS_GEN9_BC(i915) || in frequency_show()
444 max_freq *= (IS_GEN9_BC(i915) || in frequency_show()
451 max_freq *= (IS_GEN9_BC(i915) || in frequency_show()
502 if (IS_GEN9_BC(i915) || INTEL_GEN(i915) >= 10) { in llc_show()
519 (IS_GEN9_BC(i915) || in llc_show()
Dintel_sseu_debugfs.c146 if (IS_GEN9_BC(gt->i915)) in gen9_sseu_device_status()
Dintel_mocs.c335 } else if (IS_GEN9_BC(i915) || IS_CANNONLAKE(i915)) { in get_mocs_settings()
Dintel_rps.c978 IS_GEN9_BC(i915) || INTEL_GEN(i915) >= 10) { in gen6_rps_init()
991 if (IS_GEN9_BC(i915) || INTEL_GEN(i915) >= 10) { in gen6_rps_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_debugfs.c969 max_freq *= (IS_GEN9_BC(dev_priv) || in i915_frequency_info()
975 max_freq *= (IS_GEN9_BC(dev_priv) || in i915_frequency_info()
982 max_freq *= (IS_GEN9_BC(dev_priv) || in i915_frequency_info()
1028 if (IS_GEN9_BC(dev_priv) || INTEL_GEN(dev_priv) >= 10) { in i915_ring_freq_table()
1045 (IS_GEN9_BC(dev_priv) || in i915_ring_freq_table()
Di915_drv.h1614 #define IS_GEN9_BC(dev_priv) (IS_GEN(dev_priv, 9) && !IS_LP(dev_priv)) macro
Dintel_pm.c3655 return IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv); in skl_needs_memory_bw_wa()
3661 return (IS_GEN9_BC(dev_priv) || INTEL_GEN(dev_priv) >= 10) && in intel_has_sagv()
5315 if (IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) { in skl_compute_plane_wm()
5433 if (IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) in skl_compute_transition_wm()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_gmbus.c103 else if (IS_GEN9_BC(dev_priv)) in get_gmbus_pin()
122 else if (IS_GEN9_BC(dev_priv)) in intel_gmbus_is_valid_pin()
Dintel_fbc.c305 if (IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) { in gen7_fbc_activate()
448 if (IS_BROADWELL(dev_priv) || IS_GEN9_BC(dev_priv)) in find_compression_threshold()
760 if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) && in intel_fbc_gen9_wa_cfb_stride()
Dintel_ddi.c887 if (IS_GEN9_BC(dev_priv)) { in intel_ddi_get_buf_trans_edp()
925 if (IS_GEN9_BC(dev_priv)) { in intel_ddi_get_buf_trans_hdmi()
1191 } else if (IS_GEN9_BC(dev_priv)) { in intel_ddi_hdmi_level()
1243 if (IS_GEN9_BC(dev_priv) && intel_bios_dp_boost_level(encoder)) in intel_prepare_dp_ddi_buffers()
1276 if (IS_GEN9_BC(dev_priv) && intel_bios_hdmi_boost_level(encoder)) in intel_prepare_hdmi_ddi_buffers()
2887 if (IS_GEN9_BC(dev_priv)) in hsw_set_signal_levels()
3098 } else if (IS_GEN9_BC(dev_priv)) { in intel_ddi_clk_select()
3131 } else if (IS_GEN9_BC(dev_priv)) { in intel_ddi_clk_disable()
3550 if (IS_GEN9_BC(dev_priv)) in intel_ddi_pre_enable_hdmi()
3910 if (IS_GEN9_BC(dev_priv)) { in intel_enable_ddi_hdmi()
Dintel_cdclk.c1776 else if (IS_GEN9_BC(i915)) in intel_cdclk_init_hw()
1791 else if (IS_GEN9_BC(i915)) in intel_cdclk_uninit_hw()
2603 } else if (IS_GEN9_BC(dev_priv)) { in intel_update_max_cdclk()
2845 } else if (IS_GEN9_BC(dev_priv)) { in intel_init_cdclk_hooks()
2868 else if (IS_GEN9_BC(dev_priv)) in intel_init_cdclk_hooks()
Dintel_display_power.c1063 if (IS_GEN9_BC(dev_priv)) in gen9_enable_dc5()
1090 if (IS_GEN9_BC(dev_priv)) in skl_enable_dc6()
4505 } else if (IS_GEN(dev_priv, 10) || IS_GEN9_BC(dev_priv)) { in get_allowed_dc_mask()
4646 } else if (IS_GEN9_BC(dev_priv)) { in intel_power_domains_init()
5553 } else if (IS_GEN9_BC(i915)) { in intel_power_domains_init_hw()
5708 else if (IS_GEN9_BC(i915)) in intel_power_domains_suspend()
Dintel_hdcp.c208 if (IS_GEN9_BC(dev_priv)) { in intel_hdcp_load_keys()
Dintel_bios.c892 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) || in parse_psr()
Dintel_dpll_mgr.c4352 else if (IS_GEN9_BC(dev_priv)) in intel_shared_dpll_init()
Dintel_display.c11151 else if (IS_GEN9_BC(dev_priv)) in hsw_get_ddi_port_state()
16956 if (found || IS_GEN9_BC(dev_priv)) in intel_setup_outputs()
16974 if (IS_GEN9_BC(dev_priv) && in intel_setup_outputs()
Dintel_dp.c332 } else if (IS_GEN9_BC(dev_priv)) { in intel_dp_set_source_rates()