| /kernel/linux/linux-5.10/arch/x86/include/asm/ |
| D | atomic.h | 53 asm volatile(LOCK_PREFIX "addl %1,%0" in arch_atomic_add()
67 asm volatile(LOCK_PREFIX "subl %1,%0" in arch_atomic_sub()
83 return GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, e, "er", i); in arch_atomic_sub_and_test()
95 asm volatile(LOCK_PREFIX "incl %0" in arch_atomic_inc()
108 asm volatile(LOCK_PREFIX "decl %0" in arch_atomic_dec()
123 return GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, e); in arch_atomic_dec_and_test()
137 return GEN_UNARY_RMWcc(LOCK_PREFIX "incl", v->counter, e); in arch_atomic_inc_and_test()
152 return GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, s, "er", i); in arch_atomic_add_negative()
214 asm volatile(LOCK_PREFIX "andl %1,%0" in arch_atomic_and()
232 asm volatile(LOCK_PREFIX "orl %1,%0" in arch_atomic_or()
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| D | atomic64_64.h | 46 asm volatile(LOCK_PREFIX "addq %1,%0" in arch_atomic64_add()
60 asm volatile(LOCK_PREFIX "subq %1,%0" in arch_atomic64_sub()
76 return GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, e, "er", i); in arch_atomic64_sub_and_test()
88 asm volatile(LOCK_PREFIX "incq %0" in arch_atomic64_inc()
102 asm volatile(LOCK_PREFIX "decq %0" in arch_atomic64_dec()
118 return GEN_UNARY_RMWcc(LOCK_PREFIX "decq", v->counter, e); in arch_atomic64_dec_and_test()
132 return GEN_UNARY_RMWcc(LOCK_PREFIX "incq", v->counter, e); in arch_atomic64_inc_and_test()
147 return GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, s, "er", i); in arch_atomic64_add_negative()
202 asm volatile(LOCK_PREFIX "andq %1,%0" in arch_atomic64_and()
220 asm volatile(LOCK_PREFIX "orq %1,%0" in arch_atomic64_or()
[all …]
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| D | bitops.h | 55 asm volatile(LOCK_PREFIX "orb %b1,%0" in arch_set_bit()
60 asm volatile(LOCK_PREFIX __ASM_SIZE(bts) " %1,%0" in arch_set_bit()
75 asm volatile(LOCK_PREFIX "andb %b1,%0" in arch_clear_bit()
79 asm volatile(LOCK_PREFIX __ASM_SIZE(btr) " %1,%0" in arch_clear_bit()
101 asm volatile(LOCK_PREFIX "andb %2,%1" in arch_clear_bit_unlock_is_negative_byte()
126 asm volatile(LOCK_PREFIX "xorb %b1,%0" in arch_change_bit()
130 asm volatile(LOCK_PREFIX __ASM_SIZE(btc) " %1,%0" in arch_change_bit()
138 return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(bts), *addr, c, "Ir", nr); in arch_test_and_set_bit()
162 return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(btr), *addr, c, "Ir", nr); in arch_test_and_clear_bit()
201 return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(btc), *addr, c, "Ir", nr); in arch_test_and_change_bit()
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| D | futex.h | 39 "3:\t" LOCK_PREFIX "cmpxchgl %3, %2\n" \
67 unsafe_atomic_op1(LOCK_PREFIX "xaddl %0, %2", oval, in arch_futex_atomic_op_inuser()
98 "1:\t" LOCK_PREFIX "cmpxchgl %4, %2\n" in futex_atomic_cmpxchg_inatomic()
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| D | cmpxchg.h | 134 __raw_cmpxchg((ptr), (old), (new), (size), LOCK_PREFIX)
222 __raw_try_cmpxchg((ptr), (pold), (new), (size), LOCK_PREFIX)
234 #define xadd(ptr, inc) __xadd((ptr), (inc), LOCK_PREFIX)
256 __cmpxchg_double(LOCK_PREFIX, p1, p2, o1, o2, n1, n2)
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| D | cmpxchg_32.h | 31 LOCK_PREFIX "cmpxchg8b %0\n\t" in set_64bit()
50 asm volatile(LOCK_PREFIX "cmpxchg8b %1" in __cmpxchg64()
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| D | alternative.h | 45 #define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock; " macro
49 #define LOCK_PREFIX "" macro
285 .macro LOCK_PREFIX
293 .macro LOCK_PREFIX
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| D | qspinlock_paravirt.h | 46 LOCK_PREFIX "cmpxchg %dl,(%rdi);"
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| D | qspinlock.h | 23 val = GEN_BINARY_RMWcc(LOCK_PREFIX "btsl", lock->val.counter, c, in queued_fetch_set_pending_acquire()
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| /kernel/linux/linux-5.10/arch/x86/lib/ |
| D | atomic64_cx8_32.S | 15 LOCK_PREFIX
36 LOCK_PREFIX
60 LOCK_PREFIX
88 LOCK_PREFIX
113 LOCK_PREFIX
143 LOCK_PREFIX
172 LOCK_PREFIX
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| /kernel/linux/linux-5.10/tools/arch/x86/include/asm/ |
| D | atomic.h | 9 #define LOCK_PREFIX "\n\tlock; " macro
51 asm volatile(LOCK_PREFIX "incl %0" in atomic_inc()
65 GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, "%0", "e"); in atomic_dec_and_test()
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| D | cmpxchg.h | 84 __raw_cmpxchg((ptr), (old), (new), (size), LOCK_PREFIX)
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| /kernel/linux/linux-5.10/arch/x86/kvm/mmu/ |
| D | paging_tmpl.h | 157 asm volatile("1:" LOCK_PREFIX CMPXCHG " %[new], %[ptr]\n" in FNAME()
168 asm volatile("1:" LOCK_PREFIX "cmpxchg8b %[ptr]\n" in FNAME()
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