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Searched refs:OWNER_MASK (Results 1 – 5 of 5) sorted by relevance

/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
Ddma-heap.h42 #define OWNER_MASK (0xfUL << OWNER_OFFSET_BIT) macro
56 return (heap_flags & OWNER_MASK) >> OWNER_OFFSET_BIT; in get_owner_id_from_heap_flags()
/kernel/linux/linux-5.10/include/uapi/linux/
Ddma-heap.h52 #define OWNER_MASK (0xfUL << OWNER_OFFSET_BIT) macro
66 return (heap_flags & OWNER_MASK) >> OWNER_OFFSET_BIT; in get_owner_id_from_heap_flags()
/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Dhub.c223 return tegra_dc_readl(dc, offset) & OWNER_MASK; in tegra_shared_plane_get_owner()
253 owner = value & OWNER_MASK; in tegra_shared_plane_set_owner()
255 if (new && (owner != OWNER_MASK && owner != new->pipe)) { in tegra_shared_plane_set_owner()
265 if (old && owner == OWNER_MASK) in tegra_shared_plane_set_owner()
269 value &= ~OWNER_MASK; in tegra_shared_plane_set_owner()
274 value |= OWNER_MASK; in tegra_shared_plane_set_owner()
Ddc.h709 #define OWNER_MASK (0xf << 0) macro
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv50/
Ddisp.c513 case 2: ctrl |= NVDEF(NV907D, DAC_SET_CONTROL, OWNER_MASK, HEAD2); break; in nv50_dac_enable()
514 case 3: ctrl |= NVDEF(NV907D, DAC_SET_CONTROL, OWNER_MASK, HEAD3); break; in nv50_dac_enable()