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Searched refs:base_reg (Results 1 – 25 of 52) sorted by relevance

123

/kernel/linux/linux-5.10/drivers/misc/habanalabs/goya/
Dgoya_coresight.c234 u64 base_reg; in goya_config_stm() local
243 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in goya_config_stm()
245 WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); in goya_config_stm()
253 WREG32(base_reg + 0xE80, 0x80004); in goya_config_stm()
254 WREG32(base_reg + 0xD64, 7); in goya_config_stm()
255 WREG32(base_reg + 0xD60, 0); in goya_config_stm()
256 WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask)); in goya_config_stm()
257 WREG32(base_reg + 0xD20, lower_32_bits(input->sp_mask)); in goya_config_stm()
258 WREG32(base_reg + 0xD60, 1); in goya_config_stm()
259 WREG32(base_reg + 0xD00, upper_32_bits(input->he_mask)); in goya_config_stm()
[all …]
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dwinmacro.h38 #define LOAD_PT_INS(base_reg) \ argument
39 ldd [%base_reg + STACKFRAME_SZ + PT_I0], %i0; \
40 ldd [%base_reg + STACKFRAME_SZ + PT_I2], %i2; \
41 ldd [%base_reg + STACKFRAME_SZ + PT_I4], %i4; \
42 ldd [%base_reg + STACKFRAME_SZ + PT_I6], %i6;
44 #define LOAD_PT_GLOBALS(base_reg) \ argument
45 ld [%base_reg + STACKFRAME_SZ + PT_G1], %g1; \
46 ldd [%base_reg + STACKFRAME_SZ + PT_G2], %g2; \
47 ldd [%base_reg + STACKFRAME_SZ + PT_G4], %g4; \
48 ldd [%base_reg + STACKFRAME_SZ + PT_G6], %g6;
[all …]
/kernel/linux/linux-5.10/drivers/misc/habanalabs/gaudi/
Dgaudi_coresight.c395 u64 base_reg; in gaudi_config_stm() local
404 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in gaudi_config_stm()
406 WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); in gaudi_config_stm()
414 WREG32(base_reg + 0xE80, 0x80004); in gaudi_config_stm()
415 WREG32(base_reg + 0xD64, 7); in gaudi_config_stm()
416 WREG32(base_reg + 0xD60, 0); in gaudi_config_stm()
417 WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask)); in gaudi_config_stm()
418 WREG32(base_reg + 0xD60, 1); in gaudi_config_stm()
419 WREG32(base_reg + 0xD00, upper_32_bits(input->he_mask)); in gaudi_config_stm()
420 WREG32(base_reg + 0xE70, 0x10); in gaudi_config_stm()
[all …]
/kernel/linux/linux-5.10/drivers/base/regmap/
Dregcache-rbtree.c27 unsigned int base_reg; member
44 *base = rbnode->base_reg; in regcache_rbtree_get_base_top_reg()
45 *top = rbnode->base_reg + ((rbnode->blklen - 1) * map->reg_stride); in regcache_rbtree_get_base_top_reg()
68 unsigned int base_reg, top_reg; in regcache_rbtree_lookup() local
72 regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, in regcache_rbtree_lookup()
74 if (reg >= base_reg && reg <= top_reg) in regcache_rbtree_lookup()
81 regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, in regcache_rbtree_lookup()
83 if (reg >= base_reg && reg <= top_reg) { in regcache_rbtree_lookup()
88 } else if (reg < base_reg) { in regcache_rbtree_lookup()
102 unsigned int base_reg; in regcache_rbtree_insert() local
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/imx/dcss/
Ddcss-blkctl.c26 void __iomem *base_reg; member
32 dcss_writel(0, blkctl->base_reg + DCSS_BLKCTL_CONTROL0); in dcss_blkctl_cfg()
35 blkctl->base_reg + DCSS_BLKCTL_CONTROL0); in dcss_blkctl_cfg()
38 blkctl->base_reg + DCSS_BLKCTL_RESET_CTRL); in dcss_blkctl_cfg()
49 blkctl->base_reg = ioremap(blkctl_base, SZ_4K); in dcss_blkctl_init()
50 if (!blkctl->base_reg) { in dcss_blkctl_init()
66 if (blkctl->base_reg) in dcss_blkctl_exit()
67 iounmap(blkctl->base_reg); in dcss_blkctl_exit()
Ddcss-dtg.c80 void __iomem *base_reg; member
101 dcss_writel(val, dtg->base_reg + ofs); in dcss_dtg_write()
112 status = dcss_readl(dtg->base_reg + DCSS_DTG_INT_STATUS); in dcss_dtg_irq_handler()
119 dcss_writel(status & LINE0_IRQ, dtg->base_reg + DCSS_DTG_INT_CONTROL); in dcss_dtg_irq_handler()
134 dtg->base_reg + DCSS_DTG_INT_MASK); in dcss_dtg_irq_config()
163 dtg->base_reg = ioremap(dtg_base, SZ_4K); in dcss_dtg_init()
164 if (!dtg->base_reg) { in dcss_dtg_init()
185 iounmap(dtg->base_reg); in dcss_dtg_init()
197 if (dtg->base_reg) in dcss_dtg_exit()
198 iounmap(dtg->base_reg); in dcss_dtg_exit()
[all …]
Ddcss-ss.c64 void __iomem *base_reg; member
76 dcss_writel(val, ss->base_reg + ofs); in dcss_ss_write()
94 ss->base_reg = ioremap(ss_base, SZ_4K); in dcss_ss_init()
95 if (!ss->base_reg) { in dcss_ss_init()
110 dcss_writel(0, ss->base_reg + DCSS_SS_SYS_CTRL); in dcss_ss_exit()
112 if (ss->base_reg) in dcss_ss_exit()
113 iounmap(ss->base_reg); in dcss_ss_exit()
178 dcss_writel(0, ss->base_reg + DCSS_SS_SYS_CTRL); in dcss_ss_shutoff()
Ddcss-dpr.c93 void __iomem *base_reg; member
138 ch->base_reg = ioremap(ch->base_ofs, SZ_4K); in dcss_dpr_ch_init_all()
139 if (!ch->base_reg) { in dcss_dpr_ch_init_all()
148 dcss_writel(0xff, ch->base_reg + DCSS_DPR_IRQ_MASK); in dcss_dpr_ch_init_all()
171 if (dpr->ch[i].base_reg) in dcss_dpr_init()
172 iounmap(dpr->ch[i].base_reg); in dcss_dpr_init()
191 dcss_writel(0, ch->base_reg + DCSS_DPR_SYSTEM_CTRL0); in dcss_dpr_exit()
193 if (ch->base_reg) in dcss_dpr_exit()
194 iounmap(ch->base_reg); in dcss_dpr_exit()
Ddcss-scaler.c69 void __iomem *base_reg; member
288 ch->base_reg = ioremap(ch->base_ofs, SZ_4K); in dcss_scaler_ch_init_all()
289 if (!ch->base_reg) { in dcss_scaler_ch_init_all()
317 if (scaler->ch[i].base_reg) in dcss_scaler_init()
318 iounmap(scaler->ch[i].base_reg); in dcss_scaler_init()
336 dcss_writel(0, ch->base_reg + DCSS_SCALER_CTRL); in dcss_scaler_exit()
338 if (ch->base_reg) in dcss_scaler_exit()
339 iounmap(ch->base_reg); in dcss_scaler_exit()
/kernel/linux/linux-5.10/arch/arm/mach-omap1/
Dirq.c59 unsigned long base_reg; member
117 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
118 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
119 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 },
125 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
126 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed },
129 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 },
130 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 },
137 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
138 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd },
[all …]
/kernel/linux/linux-5.10/arch/nds32/kernel/
Dtraps.c100 static void __dump(struct task_struct *tsk, unsigned long *base_reg, in __dump() argument
107 while (!kstack_end(base_reg)) { in __dump()
108 ret_addr = *base_reg++; in __dump()
118 while (!kstack_end((void *)base_reg) && in __dump()
119 !((unsigned long)base_reg & 0x3) && in __dump()
120 ((unsigned long)base_reg >= TASK_SIZE)) { in __dump()
122 ret_addr = base_reg[LP_OFFSET]; in __dump()
123 next_fp = base_reg[FP_OFFSET]; in __dump()
132 base_reg = (unsigned long *)next_fp; in __dump()
140 unsigned long *base_reg; in show_stack() local
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Darizona.h133 #define ARIZONA_MUX_ENUMS(name, base_reg) \ argument
134 static ARIZONA_MUX_ENUM_DECL(name##_enum, base_reg); \
137 #define ARIZONA_MIXER_ENUMS(name, base_reg) \ argument
138 ARIZONA_MUX_ENUMS(name##_in1, base_reg); \
139 ARIZONA_MUX_ENUMS(name##_in2, base_reg + 2); \
140 ARIZONA_MUX_ENUMS(name##_in3, base_reg + 4); \
141 ARIZONA_MUX_ENUMS(name##_in4, base_reg + 6)
143 #define ARIZONA_DSP_AUX_ENUMS(name, base_reg) \ argument
144 ARIZONA_MUX_ENUMS(name##_aux1, base_reg); \
145 ARIZONA_MUX_ENUMS(name##_aux2, base_reg + 8); \
[all …]
Dmadera.h215 #define MADERA_MUX_ENUMS(name, base_reg) \ argument
216 static MADERA_MUX_ENUM_DECL(name##_enum, base_reg); \
219 #define MADERA_MIXER_ENUMS(name, base_reg) \ argument
220 MADERA_MUX_ENUMS(name##_in1, base_reg); \
221 MADERA_MUX_ENUMS(name##_in2, base_reg + 2); \
222 MADERA_MUX_ENUMS(name##_in3, base_reg + 4); \
223 MADERA_MUX_ENUMS(name##_in4, base_reg + 6)
225 #define MADERA_DSP_AUX_ENUMS(name, base_reg) \ argument
226 MADERA_MUX_ENUMS(name##_aux1, base_reg); \
227 MADERA_MUX_ENUMS(name##_aux2, base_reg + 8); \
[all …]
Dwm2200.c1087 #define WM2200_MIXER_ENUMS(name, base_reg) \ argument
1088 static WM2200_MUX_ENUM_DECL(name##_in1_enum, base_reg); \
1089 static WM2200_MUX_ENUM_DECL(name##_in2_enum, base_reg + 2); \
1090 static WM2200_MUX_ENUM_DECL(name##_in3_enum, base_reg + 4); \
1091 static WM2200_MUX_ENUM_DECL(name##_in4_enum, base_reg + 6); \
1097 #define WM2200_DSP_ENUMS(name, base_reg) \ argument
1098 static WM2200_MUX_ENUM_DECL(name##_aux1_enum, base_reg); \
1099 static WM2200_MUX_ENUM_DECL(name##_aux2_enum, base_reg + 1); \
1100 static WM2200_MUX_ENUM_DECL(name##_aux3_enum, base_reg + 2); \
1101 static WM2200_MUX_ENUM_DECL(name##_aux4_enum, base_reg + 3); \
[all …]
/kernel/linux/linux-5.10/drivers/watchdog/
Drdc321x_wdt.c51 int base_reg; member
67 rdc321x_wdt_device.base_reg, &val); in rdc321x_wdt_trigger()
70 rdc321x_wdt_device.base_reg, val); in rdc321x_wdt_trigger()
99 rdc321x_wdt_device.base_reg, RDC_CLS_TMR); in rdc321x_wdt_start()
103 rdc321x_wdt_device.base_reg, in rdc321x_wdt_start()
159 rdc321x_wdt_device.base_reg, &value); in rdc321x_wdt_ioctl()
233 rdc321x_wdt_device.base_reg = r->start; in rdc321x_wdt_probe()
247 rdc321x_wdt_device.base_reg, RDC_WDT_RST); in rdc321x_wdt_probe()
/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun8i_csc.c159 u32 base_reg; in sun8i_csc_set_coefficients() local
173 base_reg = SUN8I_CSC_COEFF(base, 0); in sun8i_csc_set_coefficients()
174 regmap_bulk_write(map, base_reg, table, 12); in sun8i_csc_set_coefficients()
183 u32 base_reg; in sun8i_de3_ccsc_set_coefficients() local
197 base_reg = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0, 0); in sun8i_de3_ccsc_set_coefficients()
198 regmap_bulk_write(map, base_reg, table, 12); in sun8i_de3_ccsc_set_coefficients()
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Ddibx000_common.c82 while (((status = dibx000_read_word(mst, mst->base_reg + 2)) & 0x0100) == 0 && --i > 0) in dibx000_is_i2c_done()
105 dibx000_read_word(mst, mst->base_reg + 2); in dibx000_master_i2c_write()
112 dibx000_write_word(mst, mst->base_reg, data); in dibx000_master_i2c_write()
129 dibx000_write_word(mst, mst->base_reg+1, da); in dibx000_master_i2c_write()
161 dibx000_write_word(mst, mst->base_reg+1, da); in dibx000_master_i2c_read()
169 da = dibx000_read_word(mst, mst->base_reg); in dibx000_master_i2c_read()
188 return dibx000_write_word(mst, mst->base_reg + 3, (u16)(60000 / speed)); in dibx000_i2c_set_speed()
204 return dibx000_write_word(mst, mst->base_reg + 4, intf); in dibx000_i2c_select_interface()
277 tx[0] = (((mst->base_reg + 1) >> 8) & 0xff); in dibx000_i2c_gate_ctrl()
278 tx[1] = ((mst->base_reg + 1) & 0xff); in dibx000_i2c_gate_ctrl()
[all …]
/kernel/linux/linux-5.10/arch/mips/kernel/
Dmips-cm.c201 u32 base_reg; in __mips_cm_l2sync_phys_base() local
207 base_reg = read_gcr_l2_only_sync_base(); in __mips_cm_l2sync_phys_base()
208 if (base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN) in __mips_cm_l2sync_phys_base()
209 return base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCBASE; in __mips_cm_l2sync_phys_base()
244 u32 base_reg; in mips_cm_probe() local
264 base_reg = read_gcr_base(); in mips_cm_probe()
265 if ((base_reg & CM_GCR_BASE_GCRBASE) != addr) { in mips_cm_probe()
/kernel/linux/linux-5.10/sound/soc/cirrus/
Dep93xx-i2s.c109 unsigned base_reg; in ep93xx_i2s_enable() local
124 base_reg = EP93XX_I2S_TX0EN; in ep93xx_i2s_enable()
126 base_reg = EP93XX_I2S_RX0EN; in ep93xx_i2s_enable()
127 ep93xx_i2s_write_reg(info, base_reg, 1); in ep93xx_i2s_enable()
139 unsigned base_reg; in ep93xx_i2s_disable() local
148 base_reg = EP93XX_I2S_TX0EN; in ep93xx_i2s_disable()
150 base_reg = EP93XX_I2S_RX0EN; in ep93xx_i2s_disable()
151 ep93xx_i2s_write_reg(info, base_reg, 0); in ep93xx_i2s_disable()
/kernel/linux/linux-5.10/drivers/net/dsa/mv88e6xxx/
Dglobal2_scratch.c52 int base_reg, unsigned int offset, in mv88e6xxx_g2_scratch_get_bit() argument
55 int reg = base_reg + (offset / 8); in mv88e6xxx_g2_scratch_get_bit()
79 int base_reg, unsigned int offset, in mv88e6xxx_g2_scratch_set_bit() argument
82 int reg = base_reg + (offset / 8); in mv88e6xxx_g2_scratch_set_bit()
/kernel/linux/linux-5.10/drivers/input/keyboard/
Dtm2-touchkey.c39 u8 base_reg; member
59 .base_reg = 0x00,
66 .base_reg = 0x00,
80 .base_reg = 0x00,
108 touchkey->variant->base_reg, data); in tm2_touchkey_led_brightness_set()
/kernel/linux/linux-5.10/drivers/bus/
Duniphier-system-bus.c118 void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE; in uniphier_system_bus_check_boot_swap() local
121 is_swapped = !(readl(base_reg) & UNIPHIER_SBC_BASE_BE); in uniphier_system_bus_check_boot_swap()
136 void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE; in uniphier_system_bus_set_reg() local
171 writel(val, base_reg + UNIPHIER_SBC_STRIDE * i); in uniphier_system_bus_set_reg()
/kernel/linux/linux-5.10/drivers/clk/tegra/
Dclk-tegra124.c188 .base_reg = PLLX_BASE,
222 .base_reg = PLLC_BASE,
276 .base_reg = PLLC2_BASE,
298 .base_reg = PLLC3_BASE,
357 .base_reg = PLLC4_BASE,
420 .base_reg = PLLM_BASE,
477 .base_reg = PLLE_BASE,
516 .base_reg = PLLRE_BASE,
553 .base_reg = PLLP_BASE,
582 .base_reg = PLLA_BASE,
[all …]
Dclk-tegra210.c734 if (readl_relaxed(clk_base + pllcx->params->base_reg) & PLL_ENABLE) { in tegra210_pllcx_set_defaults()
783 u32 val = readl_relaxed(clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
820 writel_relaxed(val, clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
839 if (readl_relaxed(clk_base + plld->params->base_reg) & in tegra210_plld_set_defaults()
889 u32 val = readl_relaxed(clk_base + plldss->params->base_reg); in plldss_defaults()
940 plldss->params->base_reg); in plldss_defaults()
955 writel_relaxed(val, clk_base + plldss->params->base_reg); in plldss_defaults()
1008 u32 val = readl_relaxed(clk_base + pllre->params->base_reg); in tegra210_pllre_set_defaults()
1052 writel_relaxed(val, clk_base + pllre->params->base_reg); in tegra210_pllre_set_defaults()
1137 if (readl_relaxed(clk_base + pllx->params->base_reg) & PLL_ENABLE) { in tegra210_pllx_set_defaults()
[all …]
Dclk-tegra114.c184 .base_reg = PLLC_BASE,
235 .base_reg = PLLC2_BASE,
257 .base_reg = PLLC3_BASE,
306 .base_reg = PLLM_BASE,
346 .base_reg = PLLP_BASE,
376 .base_reg = PLLA_BASE,
412 .base_reg = PLLD_BASE,
430 .base_reg = PLLD2_BASE,
472 .base_reg = PLLU_BASE,
501 .base_reg = PLLX_BASE,
[all …]

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