| /kernel/linux/linux-5.10/arch/sh/lib/ |
| D | udivsi3.S | 16 div1 r5,r4
18 div1 r5,r4; div1 r5,r4; div1 r5,r4
19 div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
22 div1 r5,r4; rotcl r0
23 div1 r5,r4; rotcl r0
24 div1 r5,r4; rotcl r0
25 rts; div1 r5,r4
38 div1 r5,r4
44 div1 r5,r4
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| D | udivsi3_i4i-Os.S | 38 div1 r5,r4
40 div1 r5,r4
41 div1 r5,r4
43 div1 r5,r4
48 div1 r5,r4
50 div1 r5,r4
58 div1 r5,r4
60 div1 r5,r4; div1 r5,r4; div1 r5,r4
61 div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
65 div1 r5,r4
[all …]
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| D | udivsi3_i4i.S | 55 div1 r5,r0
57 div1 r5,r0
58 div1 r5,r0
60 div1 r5,r0
102 div1 r5,r0
109 div1 r5,r0
112 div1 r5,r0
115 div1 r5,r0
118 div1 r5,r0
120 div1 r5,r0
[all …]
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| D | div64.S | 26 div1 r6, r3
36 div1 r6, r1
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| D | udiv_qrnnd.S | 29 div1 r6,r0
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-vt8500.c | 456 int div1, div2; in wm8750_find_pll_bits() local
462 for (div1 = 1; div1 >= 0; div1--) in wm8750_find_pll_bits()
465 tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2)); in wm8750_find_pll_bits()
471 *filter = wm8750_get_filter(parent_rate, div1); in wm8750_find_pll_bits()
473 *divisor1 = div1; in wm8750_find_pll_bits()
481 *divisor1 = div1; in wm8750_find_pll_bits()
504 int div1, div2; in wm8850_find_pll_bits() local
510 for (div1 = 1; div1 >= 0; div1--) in wm8850_find_pll_bits()
514 ((div1 + 1) * (1 << div2)); in wm8850_find_pll_bits()
521 *divisor1 = div1; in wm8850_find_pll_bits()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/uniphier/ |
| D | clk-uniphier.h | 110 #define UNIPHIER_CLK_DIV2(parent, div0, div1) \ argument
112 UNIPHIER_CLK_DIV(parent, div1)
114 #define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \ argument
115 UNIPHIER_CLK_DIV2(parent, div0, div1), \
118 #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ argument
119 UNIPHIER_CLK_DIV2(parent, div0, div1), \
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-cpu.c | 155 unsigned long div0, div1 = 0, mux_reg; in exynos_cpuclk_pre_rate_change() local
174 div1 = cfg_data->div1; in exynos_cpuclk_pre_rate_change()
176 div1 = readl(base + E4210_DIV_CPU1) & in exynos_cpuclk_pre_rate_change()
216 writel(div1, base + E4210_DIV_CPU1); in exynos_cpuclk_pre_rate_change()
283 unsigned long div0, div1 = 0, mux_reg; in exynos5433_cpuclk_pre_rate_change() local
300 div1 = cfg_data->div1; in exynos5433_cpuclk_pre_rate_change()
329 writel(div1, base + E5433_DIV_CPU1); in exynos5433_cpuclk_pre_rate_change()
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| D | clk-cpu.h | 28 unsigned long div1; member
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| /kernel/linux/linux-5.10/drivers/clk/zynqmp/ |
| D | divider.c | 117 int div1; in zynqmp_get_divider2_val() local
135 for (div1 = 1; div1 <= pdivider->max_div;) { in zynqmp_get_divider2_val()
137 long new_error = ((div1_prate / div1) / div2) - rate; in zynqmp_get_divider2_val()
149 div1 = div1 << 1; in zynqmp_get_divider2_val()
151 div1++; in zynqmp_get_divider2_val()
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| /kernel/linux/linux-5.10/drivers/clk/imx/ |
| D | clk-composite-8m.c | 54 int div1, div2; in imx8m_clk_composite_compute_dividers() local
61 for (div1 = 1; div1 <= PCG_PREDIV_MAX; div1++) { in imx8m_clk_composite_compute_dividers()
63 int new_error = ((parent_rate / div1) / div2) - rate; in imx8m_clk_composite_compute_dividers()
66 *prediv = div1; in imx8m_clk_composite_compute_dividers()
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| /kernel/linux/linux-5.10/drivers/spi/ |
| D | spi-omap-uwire.c | 317 int div1; in uwire_setup_transfer() local
362 div1 = 2; in uwire_setup_transfer()
365 div1 = 4; in uwire_setup_transfer()
368 div1 = 7; in uwire_setup_transfer()
372 div1 = 10; in uwire_setup_transfer()
375 div2 = (rate / div1 + hz - 1) / hz; in uwire_setup_transfer()
392 rate /= div1; in uwire_setup_transfer()
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| /kernel/linux/linux-5.10/drivers/media/tuners/ |
| D | mt2131.c | 89 u32 div1, num1, div2, num2; in mt2131_set_params() local
106 div1 = num1 / 8192; in mt2131_set_params()
137 b[3] = div1; in mt2131_set_params()
146 (int)div1, (int)num1, (int)div2, (int)num2); in mt2131_set_params()
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| D | mt2060.c | 196 u32 div1,num1,div2,num2; in mt2060_set_params() local
228 div1 = num1 / 64; in mt2060_set_params()
249 b[2] = div1; in mt2060_set_params()
256 dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2); in mt2060_set_params()
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| /kernel/linux/linux-5.10/arch/microblaze/lib/ |
| D | modsi3.S | 39 div1: label
41 bgeid r5, div1
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| D | divsi3.S | 39 div1: label
41 bgtid r5, div1
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| D | udivsi3.S | 53 div1: label
55 bgtid r5, div1
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| D | umodsi3.S | 55 div1: label
57 bgeid r5, div1
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| /kernel/linux/linux-5.10/arch/mips/alchemy/common/ |
| D | clock.c | 379 long div1, div2; in alchemy_calc_div() local
381 div1 = prate / rate; in alchemy_calc_div()
382 if ((prate / div1) > rate) in alchemy_calc_div()
383 div1++; in alchemy_calc_div()
386 if (div1 & 1) in alchemy_calc_div()
387 div1++; /* stay <=prate */ in alchemy_calc_div()
390 div2 = (div1 / scale) - 1; /* value to write to register */ in alchemy_calc_div()
397 div1 = ((div2 + 1) * scale); in alchemy_calc_div()
398 return div1; in alchemy_calc_div()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | sorgf119.c | 124 u32 div1 = sor->asy.link == 3; in gf119_sor_clock() local
132 nvkm_mask(device, 0x612300 + soff, 0x00000707, (div2 << 8) | div1); in gf119_sor_clock()
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | i2c-s3c2410.c | 801 unsigned int *div1, unsigned int *divs) in s3c24xx_i2c_calcdivisor() argument
820 *div1 = calc_div1; in s3c24xx_i2c_calcdivisor()
834 unsigned int divs, div1; in s3c24xx_i2c_clockrate() local
848 freq = s3c24xx_i2c_calcdivisor(clkin, target_frequency, &div1, &divs); in s3c24xx_i2c_clockrate()
863 if (div1 == 512) in s3c24xx_i2c_clockrate()
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| /kernel/linux/linux-5.10/drivers/clk/x86/ |
| D | clk-cgu.c | 395 unsigned int div0, div1, exdiv; in lgm_clk_ddiv_recalc_rate() local
400 div1 = lgm_get_clk_val(ddiv->membase, ddiv->reg, in lgm_clk_ddiv_recalc_rate()
406 do_div(prate, div1); in lgm_clk_ddiv_recalc_rate()
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| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | stb0899_algo.c | 1274 int div1, div2, rem1, rem2; in stb0899_dvbs2_get_srate() local
1276 div1 = config->btr_nco_bits / 2; in stb0899_dvbs2_get_srate()
1277 div2 = config->btr_nco_bits - div1 - 1; in stb0899_dvbs2_get_srate()
1285 intval1 = internal->master_clk / (1 << div1); in stb0899_dvbs2_get_srate()
1288 rem1 = internal->master_clk % (1 << div1); in stb0899_dvbs2_get_srate()
1291 srate = (intval1 * intval2) + ((intval1 * rem2) / (1 << div2)) + ((intval2 * rem1) / (1 << div1)); in stb0899_dvbs2_get_srate()
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| /kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
| D | adl_pci9118.c | 533 unsigned int *div1, unsigned int *div2, in pci9118_calc_divisors() argument
539 *div1 = *tim2 / pacer->osc_base; /* convert timer (burst) */ in pci9118_calc_divisors()
541 *div2 = *div2 / *div1; /* major timer is c1*c2 */ in pci9118_calc_divisors()
545 *tim2 = *div1 * pacer->osc_base; /* real convert timer */ in pci9118_calc_divisors()
553 *tim1 = *div1 * *div2 * pacer->osc_base; in pci9118_calc_divisors()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ti/ |
| D | dpll.txt | 43 "mult-div1" - contains the multiplier / divider register base address
|